Intel corporation (20240128247). PACKAGE ARCHITECTURE WITH GLASS CORE SUBSTRATE HAVING INTEGRATED INDUCTORS simplified abstract
Contents
- 1 PACKAGE ARCHITECTURE WITH GLASS CORE SUBSTRATE HAVING INTEGRATED INDUCTORS
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 PACKAGE ARCHITECTURE WITH GLASS CORE SUBSTRATE HAVING INTEGRATED INDUCTORS - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
PACKAGE ARCHITECTURE WITH GLASS CORE SUBSTRATE HAVING INTEGRATED INDUCTORS
Organization Name
Inventor(s)
Brandon C. Marin of Gilbert AZ (US)
Kristof Kuwawi Darmawikarta of Chandler AZ (US)
Srinivas V. Pietambaram of Chandler AZ (US)
Jeremy Ecton of Gilbert AZ (US)
Suddhasattwa Nad of Chandler AZ (US)
Hiroki Tanaka of Gilbert AZ (US)
PACKAGE ARCHITECTURE WITH GLASS CORE SUBSTRATE HAVING INTEGRATED INDUCTORS - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240128247 titled 'PACKAGE ARCHITECTURE WITH GLASS CORE SUBSTRATE HAVING INTEGRATED INDUCTORS
Simplified Explanation
The patent application describes a microelectronic assembly that includes a first substrate with glass and at least one inductor, a second substrate coupled to the first substrate, and a plurality of integrated circuit (IC) dies. The IC dies are divided into subsets, with some directly coupled to the first substrate, some directly coupled to the second substrate, and some embedded in the second substrate between the first substrate and the second subset of IC dies.
- First substrate with glass and at least one inductor
- Second substrate coupled to the first substrate
- Plurality of IC dies divided into subsets
- Some IC dies directly coupled to the first substrate
- Some IC dies directly coupled to the second substrate
- Some IC dies embedded in the second substrate between the first substrate and the second subset of IC dies
Potential Applications
The technology described in the patent application could be applied in:
- Microelectronics manufacturing
- Circuit board design
- Electronic device production
Problems Solved
This technology helps in:
- Improving integration of IC dies
- Enhancing performance of microelectronic assemblies
- Facilitating compact design of electronic devices
Benefits
The benefits of this technology include:
- Increased efficiency in microelectronic assembly
- Enhanced functionality of integrated circuits
- Reduction in space requirements for electronic components
Potential Commercial Applications
The potential commercial applications of this technology could be in:
- Consumer electronics
- Automotive electronics
- Aerospace industry
Possible Prior Art
One possible prior art for this technology could be the use of embedded IC dies in substrates for microelectronic assemblies.
Unanswered Questions
How does this technology impact the overall cost of microelectronic assembly production?
The article does not provide information on the cost implications of implementing this technology in microelectronic assembly production.
What are the specific performance improvements achieved by embedding IC dies in the second substrate?
The article does not detail the specific performance enhancements resulting from embedding IC dies in the second substrate.
Original Abstract Submitted
embodiments described herein enable a microelectronic assembly that includes: a first substrate comprising glass and at least one inductor, the first substrate having a first side and an opposing second side; a second substrate coupled to the first side of the first substrate; and a plurality of integrated circuit (ic) dies. a first subset of the plurality of ic dies is directly coupled to the second side of the first substrate, a second subset of the plurality of ic dies is directly coupled to the second substrate adjacent to the first substrate, and a third subset of the plurality of ic dies is embedded in the second substrate between the first substrate and the second subset of the plurality of ic dies.
- Intel corporation
- Brandon C. Marin of Gilbert AZ (US)
- Kristof Kuwawi Darmawikarta of Chandler AZ (US)
- Srinivas V. Pietambaram of Chandler AZ (US)
- Gang Duan of Chandler AZ (US)
- Jeremy Ecton of Gilbert AZ (US)
- Suddhasattwa Nad of Chandler AZ (US)
- Hiroki Tanaka of Gilbert AZ (US)
- H01L25/16
- H01F27/02
- H01F27/28
- H01F27/29
- H01F41/00
- H01F41/04
- H01L21/48
- H01L23/00
- H01L23/538