Category:Zhiwei Gong of Chandler AZ (US)

Zhiwei Gong of Chandler AZ (US)

Executive Summary

Zhiwei Gong of Chandler AZ (US) is an inventor who has filed 4 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (3 patents), the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({ (3 patents), the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({ (3 patents), and they have worked with companies such as NXP USA, Inc. (3 patents), NXP USA, INC. (1 patents). Their most frequent collaborators include (3 collaborations), (3 collaborations), (3 collaborations).

Patent Filing Activity

Technology Areas

List of Technology Areas

• H01L23/3128 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L23/5386 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 3 patents
• H01L23/5389 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 3 patents
• H01L21/4857 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 2 patents
• H01L21/486 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 2 patents
• H01L21/566 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L23/49816 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 2 patents
• H01L23/49822 ({Multilayer substrates (multilayer metallisation on monolayer substrate): 2 patents
• H01L23/49838 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 2 patents
• H01L25/165 (the devices being of types provided for in two or more different main groups of groups): 2 patents
• H01L24/16 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L23/5383 ({Multilayer substrates (): 2 patents
• H01L2924/19041 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2924/19042 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2924/19043 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L23/66 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L21/565 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L25/162 (the devices being of types provided for in two or more different main groups of groups): 1 patents
• H01L21/4853 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
• H01L23/49833 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
• H01L23/5385 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
• H01L23/145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/16235 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/3114 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/24 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2223/6672 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/24195 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/15311 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/19011 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/552 (Protection against radiation, e.g. light {or electromagnetic waves}): 1 patents
• H01L24/20 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01P3/06 (Coaxial lines): 1 patents
• H01P11/005 (Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type): 1 patents
• H01Q1/2283 ({mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package}): 1 patents
• H01Q9/0407 ({Substantially flat resonant element parallel to ground plane, e.g. patch antenna (dipole): 1 patents
• H01L2223/6622 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2223/6677 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/214 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/3025 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents

Companies

List of Companies

• NXP USA, Inc.: 3 patents
• NXP USA, INC.: 1 patents

Collaborators

• Michael B. Vincent of Chandler AZ (US) (3 collaborations)
• Antonius Hendrikus Jozef Kamphuis (3 collaborations)
• Leo van Gemert (3 collaborations)
• Scott M. Hayes of Chandler AZ (US) (2 collaborations)
• Wen Hung Huang (2 collaborations)
• Wen Hung Huang of Chandler AZ (US) (1 collaborations)
• Scott M Hayes of Chandler AZ (US) (1 collaborations)
• Mustafa Acar (1 collaborations)
• Tingdong Zhou of Austin TX (US) (1 collaborations)
• Robert Joseph Wenzel of Austin TX (US) (1 collaborations)