Category:Taeksang Song of San Jose CA (US)

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Taeksang Song of San Jose CA (US)

Executive Summary

Taeksang Song of San Jose CA (US) is an inventor who has filed 6 patents. Their primary areas of innovation include Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches (1 patents), Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers (1 patents), {Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor} (1 patents), and they have worked with companies such as Rambus Inc. (6 patents). Their most frequent collaborators include (3 collaborations), (2 collaborations), (1 collaborations).

Patent Filing Activity

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Technology Areas

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List of Technology Areas

  • G06F12/0802 (Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches): 1 patents
  • G11C7/1084 (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers): 1 patents
  • G11C7/1006 ({Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor}): 1 patents
  • G06F3/065 ({Replication mechanisms}): 1 patents
  • G06F3/0611 ({in relation to response time}): 1 patents
  • G06F3/064 ({Management of blocks}): 1 patents
  • G06F3/0683 ({Plurality of storage devices}): 1 patents
  • G06F3/0689 ({Disk arrays, e.g. RAID, JBOD}): 1 patents
  • G06F3/0623 ({in relation to content}): 1 patents
  • G06F3/0656 ({Data buffering arrangements}): 1 patents
  • G06F3/0659 ({Command handling arrangements, e.g. command buffers, queues, command scheduling}): 1 patents
  • G11C7/1069 ({I/O lines read out arrangements}): 1 patents
  • G11C7/1039 ({using pipelining techniques, i.e. using latches between functional memory parts, e.g. row/column decoders, I/O buffers, sense amplifiers}): 1 patents
  • G11C7/1063 (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers): 1 patents
  • G11C7/24 (STATIC STORES (semiconductor memory devices): 1 patents
  • G06F12/0815 (Cache consistency protocols): 1 patents
  • G06F12/123 (Replacement control): 1 patents
  • G06F2212/305 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents

Companies

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List of Companies

  • Rambus Inc.: 6 patents

Collaborators