Category:Kuo-Cheng CHIANG

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Kuo-Cheng CHIANG

Executive Summary

Kuo-Cheng CHIANG is an inventor who has filed 24 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (18 patents), {using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate} (16 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (15 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Company, Ltd. (14 patents), TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (10 patents). Their most frequent collaborators include (19 collaborations), (10 collaborations), (6 collaborations).

Patent Filing Activity

Kuo-Cheng CHIANG Monthly Patent Applications.png

Technology Areas

Kuo-Cheng CHIANG Top Technology Areas.png

List of Technology Areas

  • H01L29/42392 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 18 patents
  • H01L29/66545 ({using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate}): 16 patents
  • H01L29/0673 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 15 patents
  • H01L29/78696 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 14 patents
  • H01L21/823431 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 10 patents
  • H01L29/66439 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 8 patents
  • H01L29/775 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 8 patents
  • H01L29/0847 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
  • H01L21/823418 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 6 patents
  • H01L21/823412 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 5 patents
  • H01L21/823807 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 4 patents
  • H01L21/823814 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 4 patents
  • H01L29/66742 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • H01L21/823468 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 4 patents
  • H01L21/02603 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L29/66553 ({using self aligned silicidation, i.e. salicide (formation of conductive layers comprising silicides): 3 patents
  • H01L21/823481 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 3 patents
  • H01L29/66795 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L29/6656 ({using self aligned silicidation, i.e. salicide (formation of conductive layers comprising silicides): 3 patents
  • H01L27/0886 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L27/0922 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L21/823878 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
  • H01L27/092 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L21/823828 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
  • H01L29/6653 ({using self aligned silicidation, i.e. salicide (formation of conductive layers comprising silicides): 2 patents
  • H01L29/7851 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L21/76224 ({using trench refilling with dielectric materials (trench filling with polycristalline silicon): 2 patents
  • H01L21/30604 (Chemical or electrical treatment, e.g. electrolytic etching (to form insulating layers): 2 patents
  • H01L21/28518 (from a gas or vapour, e.g. condensation): 1 patents
  • H01L21/823871 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L29/45 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/78618 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/28088 (Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups): 1 patents
  • H01L21/823842 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L29/4908 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/823857 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L27/088 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/823456 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L21/823475 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L29/7848 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/481 (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 1 patents
  • H01L29/0649 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/28575 (from a gas or vapour, e.g. condensation): 1 patents
  • H01L27/0928 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/823892 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L27/1108 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L27/1104 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/32137 ({of silicon-containing layers}): 1 patents
  • H01L27/11 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/32139 ({using masks}): 1 patents
  • H01L21/3086 ({characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment}): 1 patents
  • H01L29/7853 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/7854 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/83 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/32 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L25/0657 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/29 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/0245 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/26533 (producing ion implantation): 1 patents
  • H01L24/16 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/49894 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
  • H01L23/49838 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
  • H01L23/49816 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
  • H01L23/49822 ({Multilayer substrates (multilayer metallisation on monolayer substrate): 1 patents
  • H01L23/5386 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
  • H01L23/5389 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
  • H01L2225/06524 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2225/06541 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2225/06517 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2225/06593 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/37001 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/29187 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/83005 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/8313 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/83123 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/8383 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/32145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/16227 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/4857 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
  • H01L29/66787 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/785 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/0642 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • B82Y40/00 (Manufacture or treatment of nanostructures): 1 patents
  • H01L29/42376 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/7856 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L27/1207 ({combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits}): 1 patents
  • H01L21/8221 ({Three dimensional integrated circuits stacked in different levels}): 1 patents
  • H01L21/76843 ({formed in openings in a dielectric}): 1 patents

Companies

Kuo-Cheng CHIANG Top Companies.png

List of Companies

  • Taiwan Semiconductor Manufacturing Company, Ltd.: 14 patents
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.: 10 patents

Collaborators

Subcategories

This category has the following 3 subcategories, out of 3 total.

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