Category:Jonathan S. Parry of Boise ID (US)
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Jonathan S. Parry of Boise ID (US)
Executive Summary
Jonathan S. Parry of Boise ID (US) is an inventor who has filed 26 patents. Their primary areas of innovation include {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} (13 patents), {Command handling arrangements, e.g. command buffers, queues, command scheduling} (8 patents), {in relation to data integrity, e.g. data losses, bit errors} (7 patents), and they have worked with companies such as Micron Technology, Inc. (21 patents), MICRON TECHNOLOGY, INC. (5 patents). Their most frequent collaborators include (7 collaborations), (5 collaborations), (5 collaborations).
Patent Filing Activity
Technology Areas
List of Technology Areas
- G06F3/0679 ({Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}): 13 patents
- G06F3/0659 ({Command handling arrangements, e.g. command buffers, queues, command scheduling}): 8 patents
- G06F3/0619 ({in relation to data integrity, e.g. data losses, bit errors}): 7 patents
- G06F3/0653 ({Monitoring storage devices or systems}): 5 patents
- G06F3/0604 (Digital input from, or digital output to, record carriers {, e.g. RAID, emulated record carriers or networked record carriers}): 5 patents
- G06F3/0625 ({Power saving in storage systems}): 3 patents
- G06F3/0656 ({Data buffering arrangements}): 2 patents
- G06F3/0683 ({Plurality of storage devices}): 2 patents
- G06F3/064 ({Management of blocks}): 2 patents
- G06F3/0631 ({by allocating resources to storage systems}): 2 patents
- G06F11/1068 ({in sector programmable memories, e.g. flash disk (): 2 patents
- G06F11/0772 (Responding to the occurrence of a fault, e.g. fault tolerance): 2 patents
- G06F3/0629 ({Configuration or reconfiguration of storage systems}): 2 patents
- G06F3/0611 ({in relation to response time}): 2 patents
- G11C16/26 (Sensing or reading circuits; Data output circuits): 2 patents
- G06F11/1076 ({Parity data used in redundant arrays of independent storages, e.g. in RAID systems}): 1 patents
- G11C16/3431 (STATIC STORES (semiconductor memory devices): 1 patents
- G11C7/04 (with means for avoiding disturbances due to temperature effects): 1 patents
- G11C16/32 (Timing circuits): 1 patents
- G06F3/0652 ({Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket}): 1 patents
- G06F3/0688 ({Non-volatile semiconductor memory arrays}): 1 patents
- G06F3/0634 ({by changing the state or mode of one or more devices}): 1 patents
- G06F12/0253 ({Garbage collection, i.e. reclamation of unreferenced memory}): 1 patents
- G11C16/30 (Power supply circuits): 1 patents
- G11C5/06 (STATIC STORES (semiconductor memory devices): 1 patents
- G06F11/0757 (Responding to the occurrence of a fault, e.g. fault tolerance): 1 patents
- G06F1/3275 (Means for saving power): 1 patents
- G06F1/3225 (Means for saving power): 1 patents
- G06F12/0891 (using clearing, invalidating or resetting means): 1 patents
- G06F12/0833 (in hierarchically structured memory systems, e.g. virtual memory systems): 1 patents
- G06F13/1668 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
- G11C16/3427 (STATIC STORES (semiconductor memory devices): 1 patents
- G11C16/08 (Address circuits; Decoders; Word-line control circuits): 1 patents
- G06F3/0673 ({Single storage device}): 1 patents
- G06F12/0292 ({using tables or multilevel address translation means (): 1 patents
- G06F12/10 (Address translation): 1 patents
- G11C16/0483 ({comprising cells having several storage transistors connected in series}): 1 patents
- G11C16/10 (Programming or data input circuits): 1 patents
- G11C2216/14 (STATIC STORES (semiconductor memory devices): 1 patents
- G06F2212/657 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
- G06F3/0617 ({in relation to availability}): 1 patents
- G06F16/9535 (Search customisation based on user profiles and personalisation): 1 patents
- G06F16/9538 (Retrieval from the web): 1 patents
- H04N21/2668 (Creating a channel for a dedicated end-user group, e.g. insertion of targeted commercials based on end-user profiles {(information retrieval from the Internet by querying with filtering and personalisation): 1 patents
- H04N21/25891 ({being end-user preferences (retrieval of video data in a video database based on user preferences): 1 patents
- H04N21/23418 ({involving operations for analysing video streams, e.g. detecting features or characteristics (television picture signal circuitry for scene change detection): 1 patents
- H04N21/251 ({Learning process for intelligent management, e.g. learning user preferences for recommending movies (details of learning user preferences for the retrieval of video data in a video database): 1 patents
- H04N21/8456 ({by decomposing the content in the time domain, e.g. in time segments}): 1 patents
Companies
List of Companies
- Micron Technology, Inc.: 21 patents
- MICRON TECHNOLOGY, INC.: 5 patents
Collaborators
- Akira Goda (7 collaborations)
- Kishore Kumar Muchherla of San Jose CA (US) (5 collaborations)
- Reshmi Basu of Boise ID (US) (5 collaborations)
- Liang Yu of Boise ID (US) (5 collaborations)
- Nicola Ciocchini of Boise ID (US) (4 collaborations)
- Jung Sheng Hoei of Newark CA (US) (4 collaborations)
- Nitul Gohain (4 collaborations)
- Kishore Kumar Muchherla of Fremont CA (US) (3 collaborations)
- Giuseppe Cariello of Boise ID (US) (3 collaborations)
- Stephen Hanna of Fort Collins CO (US) (3 collaborations)
- Animesh R. Chowdhury of Boise ID (US) (2 collaborations)
- Niccolo' Righetti of Boise ID (US) (2 collaborations)
- Eric N. Lee of San Jose CA (US) (2 collaborations)
- Jeffrey S. McNeil of Nampa ID (US) (2 collaborations)
- Animesh Roy Chowdhury of Boise ID (US) (2 collaborations)
- Niccolo’ Righetti of Boise ID (US) (2 collaborations)
- Ugo Russo of Boise ID (US) (2 collaborations)
- Jeremy Binfet of Boise ID (US) (2 collaborations)
- Jameer Mulani (2 collaborations)
- Deping He of Boise ID (US) (2 collaborations)
- Chulbum Kim of San Jose CA (US) (2 collaborations)
- Chiara Cerafogli of Boise ID (US) (2 collaborations)
- Kishore K. Muchherla of San Jose CA (US) (1 collaborations)
- David Scott Ebsen of Minnetonka MN (US) (1 collaborations)
- Vivek Shivhare of Milpitas CA (US) (1 collaborations)
- Suresh Rajgopal of San Diego CA (US) (1 collaborations)
- Lakshmi Kalpana Vakati of Fremont CA (US) (1 collaborations)
- Yanhua Bi (1 collaborations)
- Mustafa N. Kaynak of San Diego CA (US) (1 collaborations)
- Sivagnanam Parthasarathy of Carlsbad CA (US) (1 collaborations)
- Luca Nubile (1 collaborations)
- Ali Mohammadzadeh of Mountain View CA (US) (1 collaborations)
- Biagio Iorio (1 collaborations)
- Walter Di Francesco (1 collaborations)
- Daniel J. Hubbard of Boise ID (US) (1 collaborations)
- Luigi Pilolli (1 collaborations)
- Hojung Yun of San Jose CA (US) (1 collaborations)
- Tal Sharifie (1 collaborations)
- Chun Sum Yeung of San Jose CA (US) (1 collaborations)
- Ting Luo of Santa Clara CA (US) (1 collaborations)
- Guang Hu of Mountain View CA (US) (1 collaborations)
- Robert Loren O. Ursua of Folsom CA (US) (1 collaborations)
- Sead Zildzic of Rancho Cordova CA (US) (1 collaborations)
- Lakshmi Kalpana K. Vakati of Fremont CA (US) (1 collaborations)
- David Aaron Palmer of Boise ID (US) (1 collaborations)
- Luca Porzio (1 collaborations)
Subcategories
This category has the following 4 subcategories, out of 4 total.
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Pages in category "Jonathan S. Parry of Boise ID (US)"
The following 38 pages are in this category, out of 38 total.
1
- 17863000. MODIFIED READ COUNTER INCREMENTING SCHEME IN A MEMORY SUB-SYSTEM simplified abstract (Micron Technology, Inc.)
- 17888309. COMPRESSION AND DECOMPRESSION OF TRIM DATA simplified abstract (Micron Technology, Inc.)
- 17888325. CACHING FOR MULTIPLE-LEVEL MEMORY DEVICE simplified abstract (Micron Technology, Inc.)
- 17894794. TWO-TIER DEFECT SCAN MANAGEMENT simplified abstract (Micron Technology, Inc.)
- 17895886. READ COUNTER ADJUSTMENT FOR DELAYING READ DISTURB SCANS simplified abstract (Micron Technology, Inc.)
- 17898333. MEMORY BLOCK ERASE PROTOCOL simplified abstract (Micron Technology, Inc.)
- 17898779. PADDING CACHED DATA WITH VALID DATA FOR MEMORY FLUSH COMMANDS simplified abstract (Micron Technology, Inc.)
- 18229249. SCHEDULED INTERRUPTS FOR PEAK POWER MANAGEMENT TOKEN RING COMMUNICATION simplified abstract (Micron Technology, Inc.)
- 18419895. MODIFIED READ COUNTER INCREMENTING SCHEME IN A MEMORY SUB-SYSTEM simplified abstract (Micron Technology, Inc.)
- 18431817. SEMICONDUCTOR ASSEMBLIES WITH RECESSED INDUCTORS, AND METHODS FOR MAKING THE SAME simplified abstract (Micron Technology, Inc.)
- 18483091. TEMPORARY PARITY BUFFER ALLOCATION FOR ZONES IN A PARITY GROUP simplified abstract (Micron Technology, Inc.)
- 18505855. MEDIA MANAGEMENT SCANNING WITH UNIFIED CRITERIA TO ALLEVIATE FAST AND LATENT READ DISTURB simplified abstract (Micron Technology, Inc.)
- 18519458. ENHANCED READ PERFORMANCE FOR MEMORY DATA WORD DECODING USING POWER ALLOCATION BASED ON ERROR PATTERN DETECTION simplified abstract (Micron Technology, Inc.)
- 18534363. TECHNIQUES FOR CONCURRENT HOST SYSTEM ACCESS AND DATA FOLDING simplified abstract (MICRON TECHNOLOGY, INC.)
- 18540448. PARTITIONED TRANSFERRING FOR WRITE BOOSTER simplified abstract (Micron Technology, Inc.)
- 18595590. MANAGING POWER CONSUMPTION ASSOCIATED WITH COMMUNICATING DATA IN A MEMORY SYSTEM simplified abstract (Micron Technology, Inc.)
- 18623881. WORKLOAD-BASED SCAN OPTIMIZATION simplified abstract (Micron Technology, Inc.)
- 18638471. HOST RECOVERY FOR A STUCK CONDITION simplified abstract (Micron Technology, Inc.)
- 18672645. PADDING CACHED DATA WITH VALID DATA FOR MEMORY FLUSH COMMANDS simplified abstract (Micron Technology, Inc.)
M
- Micron technology, inc. (20240126448). ADAPTIVE READ DISTURB SCAN simplified abstract
- Micron technology, inc. (20240160359). MODIFIED READ COUNTER INCREMENTING SCHEME IN A MEMORY SUB-SYSTEM simplified abstract
- Micron technology, inc. (20240161838). MEDIA MANAGEMENT SCANNING WITH UNIFIED CRITERIA TO ALLEVIATE FAST AND LATENT READ DISTURB simplified abstract
- Micron technology, inc. (20240176701). ENHANCED READ PERFORMANCE FOR MEMORY DATA WORD DECODING USING POWER ALLOCATION BASED ON ERROR PATTERN DETECTION simplified abstract
- Micron technology, inc. (20240201888). OPPORTUNISTIC STORAGE OF NON-WRITE-BOOSTED DATA IN WRITE BOOSTER CACHE MEMORY simplified abstract
- Micron technology, inc. (20240220144). TECHNIQUES FOR CONCURRENT HOST SYSTEM ACCESS AND DATA FOLDING simplified abstract
- Micron technology, inc. (20240241665). PARTITIONED TRANSFERRING FOR WRITE BOOSTER simplified abstract
- Micron technology, inc. (20240248646). WORKLOAD-BASED SCAN OPTIMIZATION simplified abstract
- Micron technology, inc. (20240288924). POWER ARBITRATION FOR SYSTEMS OF ELECTRONIC COMPONENTS simplified abstract
- Micron technology, inc. (20240289052). ORDERING ENTRIES OF AN INPUT COMMAND QUEUE simplified abstract
- Micron technology, inc. (20240289236). EFFICIENT DATA MANAGEMENT FOR MEMORY SYSTEM ERROR HANDLING simplified abstract
- Micron technology, inc. (20240290396). POWER MANAGEMENT ASSOCIATED WITH MEMORY AND CONTROLLER simplified abstract
- Micron technology, inc. (20240290411). TOPOLOGY-BASED RETIREMENT IN A MEMORY SYSTEM simplified abstract
- Micron technology, inc. (20240304371). SEMICONDUCTOR ASSEMBLIES WITH RECESSED INDUCTORS, AND METHODS FOR MAKING THE SAME simplified abstract
- Micron technology, inc. (20240311053). MANAGING POWER CONSUMPTION ASSOCIATED WITH COMMUNICATING DATA IN A MEMORY SYSTEM simplified abstract
- Micron technology, inc. (20240311309). PADDING CACHED DATA WITH VALID DATA FOR MEMORY FLUSH COMMANDS simplified abstract
- Micron technology, inc. (20240345750). HOST RECOVERY FOR A STUCK CONDITION simplified abstract
- Micron technology, inc. (20240411459). CODE RATE AS FUNCTION OF LOGICAL SATURATION
Categories:
- Akira Goda
- Kishore Kumar Muchherla of San Jose CA (US)
- Reshmi Basu of Boise ID (US)
- Liang Yu of Boise ID (US)
- Nicola Ciocchini of Boise ID (US)
- Jung Sheng Hoei of Newark CA (US)
- Nitul Gohain
- Kishore Kumar Muchherla of Fremont CA (US)
- Giuseppe Cariello of Boise ID (US)
- Stephen Hanna of Fort Collins CO (US)
- Animesh R. Chowdhury of Boise ID (US)
- Niccolo' Righetti of Boise ID (US)
- Eric N. Lee of San Jose CA (US)
- Jeffrey S. McNeil of Nampa ID (US)
- Animesh Roy Chowdhury of Boise ID (US)
- Niccolo’ Righetti of Boise ID (US)
- Ugo Russo of Boise ID (US)
- Jeremy Binfet of Boise ID (US)
- Jameer Mulani
- Deping He of Boise ID (US)
- Chulbum Kim of San Jose CA (US)
- Chiara Cerafogli of Boise ID (US)
- Kishore K. Muchherla of San Jose CA (US)
- David Scott Ebsen of Minnetonka MN (US)
- Vivek Shivhare of Milpitas CA (US)
- Suresh Rajgopal of San Diego CA (US)
- Lakshmi Kalpana Vakati of Fremont CA (US)
- Yanhua Bi
- Mustafa N. Kaynak of San Diego CA (US)
- Sivagnanam Parthasarathy of Carlsbad CA (US)
- Luca Nubile
- Ali Mohammadzadeh of Mountain View CA (US)
- Biagio Iorio
- Walter Di Francesco
- Daniel J. Hubbard of Boise ID (US)
- Luigi Pilolli
- Hojung Yun of San Jose CA (US)
- Tal Sharifie
- Chun Sum Yeung of San Jose CA (US)
- Ting Luo of Santa Clara CA (US)
- Guang Hu of Mountain View CA (US)
- Robert Loren O. Ursua of Folsom CA (US)
- Sead Zildzic of Rancho Cordova CA (US)
- Lakshmi Kalpana K. Vakati of Fremont CA (US)
- David Aaron Palmer of Boise ID (US)
- Luca Porzio
- Jonathan S. Parry of Boise ID (US)
- Inventors
- Inventors filing patents with Micron Technology, Inc.
- Inventors filing patents with MICRON TECHNOLOGY, INC.