Category:Jhon-Jhy LIAW

Jhon-Jhy LIAW

Executive Summary

Jhon-Jhy LIAW is an inventor who has filed 20 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (9 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (9 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (8 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Company, Ltd. (14 patents), TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (6 patents). Their most frequent collaborators include (8 collaborations), (4 collaborations), (3 collaborations).

Patent Filing Activity

Technology Areas

List of Technology Areas

• H01L29/42392 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 9 patents
• H01L29/0673 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 9 patents
• H01L29/78696 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 8 patents
• H01L29/775 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 6 patents
• H01L29/66545 ({using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate}): 6 patents
• H01L29/66439 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
• H01L29/0847 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
• H01L21/823431 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 4 patents
• H01L21/823418 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 4 patents
• H01L29/41733 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L21/823412 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 4 patents
• H01L21/823481 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 3 patents
• H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L29/66795 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L27/0924 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L27/0886 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L29/7851 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L29/6656 ({using self aligned silicidation, i.e. salicide (formation of conductive layers comprising silicides): 2 patents
• H01L29/401 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L21/823821 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
• H01L27/11807 (Masterslice integrated circuits): 2 patents
• H01L27/1108 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L23/5283 ({Geometry or} layout of the interconnection structure {(): 1 patents
• H01L29/66553 ({using self aligned silicidation, i.e. salicide (formation of conductive layers comprising silicides): 1 patents
• H01L27/092 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L27/0922 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/823814 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H01L2027/11831 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2027/11881 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L27/1104 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L27/1116 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• G11C11/4085 ({Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge}): 1 patents
• G11C11/4096 (Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches): 1 patents
• G11C11/4097 (Bit-line organisation, e.g. bit-line layout, folded bit lines): 1 patents
• G11C7/12 (STATIC STORES (semiconductor memory devices): 1 patents
• H01L23/481 (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 1 patents
• H01L2027/11853 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/02603 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/785 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• G11C7/1069 ({I/O lines read out arrangements}): 1 patents
• G11C5/063 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C7/1096 (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers): 1 patents
• H01L21/823475 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H01L29/0653 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H10B10/125 (ELECTRONIC MEMORY DEVICES): 1 patents
• H01L27/0207 ({Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique}): 1 patents
• H01L29/161 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H03K19/0013 (Logic circuits, i.e. having at least two inputs acting on one output (circuits for computer systems using fuzzy logic): 1 patents
• H03K19/0948 (PULSE TECHNIQUE (measuring pulse characteristics): 1 patents

Companies

List of Companies

• Taiwan Semiconductor Manufacturing Company, Ltd.: 14 patents
• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.: 6 patents

Collaborators

• Ta-Chun LIN (8 collaborations)
• Kuo-Hua PAN (4 collaborations)
• Chih-Hao CHANG (3 collaborations)
• Da-Zhi ZHANG (2 collaborations)
• Po-Nien CHEN (2 collaborations)
• Hsiao-Han LIU (2 collaborations)
• Chih-Yung LIN (2 collaborations)
• Chun-Sheng LIANG (2 collaborations)
• Chung-Pin HUANG (1 collaborations)
• Chun-An LU (1 collaborations)
• Chung-Yu CHIANG (1 collaborations)
• Huang-Chao CHANG (1 collaborations)
• Chun-Jun LIN (1 collaborations)
• Chao-Ching CHENG (1 collaborations)
• Hung-Li CHIANG (1 collaborations)
• Shih-Syuan HUANG (1 collaborations)
• Tzu-Chiang CHEN (1 collaborations)
• I-Sheng CHEN (1 collaborations)
• Sai-Hooi YEONG (1 collaborations)