Category:David A. Secker of San Jose CA (US)

David A. Secker of San Jose CA (US)

Executive Summary

David A. Secker of San Jose CA (US) is an inventor who has filed 3 patents. Their primary areas of innovation include ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models (1 patents), ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models (1 patents), Accessing, addressing or allocating within memory systems or architectures (digital input from, or digital output to record carriers, e.g. to disk storage units, (1 patents), and they have worked with companies such as Rambus Inc. (3 patents). Their most frequent collaborators include (2 collaborations), (2 collaborations), (2 collaborations).

Patent Filing Activity

Technology Areas

List of Technology Areas

• G06F13/4022 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
• G06F13/1673 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
• G06F12/00 (Accessing, addressing or allocating within memory systems or architectures (digital input from, or digital output to record carriers, e.g. to disk storage units,): 1 patents
• G06F13/00 (Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (interface circuits for specific input/output devices): 1 patents
• G06F13/1694 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
• G11C8/12 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C5/02 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C5/04 (Supports for storage elements {, e.g. memory modules}; Mounting or fixing of storage elements on such supports): 1 patents
• G11C5/06 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C5/063 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C7/1012 (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers): 1 patents
• G11C7/1045 ({Read-write mode select circuits}): 1 patents
• G11C8/18 (Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals): 1 patents
• H01L24/49 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L25/0657 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/32 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/48 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/73 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/16225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/32145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/32225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/45099 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/48095 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/48227 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/48471 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/49171 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/49433 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/73265 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/0651 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/00012 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/00014 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/15311 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/181 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• G06F3/0635 ({by changing the path, e.g. traffic rerouting, path reconfiguration}): 1 patents
• G06F3/0613 ({in relation to throughput}): 1 patents
• G06F3/0656 ({Data buffering arrangements}): 1 patents
• G06F3/0673 ({Single storage device}): 1 patents
• G06F13/1678 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
• Y02D10/00 (No explanation available): 1 patents

Companies

List of Companies

• Rambus Inc.: 3 patents

Collaborators

• Suresh Rajan of San Jose CA (US) (2 collaborations)
• Ravindranath Kollipara of Palo Alto CA (US) (2 collaborations)
• Ian Shaeffer of Los Gatos CA (US) (2 collaborations)
• Amir Amirkhany of Sunnyvale CA (US) (1 collaborations)
• Lawrence Lai of San Jose CA (US) (1 collaborations)
• Fan Ho of San Ramon CA (US) (1 collaborations)
• Wayne S. Richardson of Saratoga CA (US) (1 collaborations)
• Akash Bansal of Santa Clara CA (US) (1 collaborations)
• Brian S. Leibowitz of San Francisco CA (US) (1 collaborations)
• Kyung Suk Oh of Cupertino CA (US) (1 collaborations)
• Abhijit M. Abhyankar of Sunnyvale CA (US) (1 collaborations)