18662916. METHODS OF FABRICATING PACKAGE STRUCTURE simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

METHODS OF FABRICATING PACKAGE STRUCTURE

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Ming-Fa Chen of Taichung City (TW)

Chao-Wen Shih of Hsinchu County (TW)

Min-Chien Hsiao of Taichung City (TW)

Nien-Fang Wu of Chiayi City (TW)

Sung-Feng Yeh of Taipei City (TW)

Tzuan-Horng Liu of Taoyuan City (TW)

METHODS OF FABRICATING PACKAGE STRUCTURE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18662916 titled 'METHODS OF FABRICATING PACKAGE STRUCTURE

Simplified Explanation: The patent application describes a die stack structure consisting of two semiconductor dies, an insulating encapsulation, and a redistribution circuit structure. The first semiconductor die has a larger lateral dimension than the second portion, with interconnect and bonding structures. The second semiconductor die is placed on top of the first die and connected electrically. The encapsulation surrounds the first portion and the second die, while the redistribution circuit connects both semiconductor dies.

Key Features and Innovation:

• Die stack structure with two semiconductor dies
• Insulating encapsulation for protection
• Redistribution circuit structure for electrical connections
• Varied lateral dimensions of semiconductor portions
• Efficient stacking of semiconductor components

Potential Applications: This technology can be used in:

• Integrated circuits
• Microprocessors
• Memory modules
• Power management systems

Problems Solved:

• Efficient stacking of semiconductor dies
• Improved electrical connections
• Enhanced protection with encapsulation

Benefits:

• Higher integration density
• Improved performance
• Enhanced reliability
• Space-saving design

Commercial Applications: Potential commercial applications include:

• Consumer electronics
• Automotive systems
• Telecommunications equipment
• Industrial machinery

Prior Art: Prior art related to this technology can be found in research papers and patents related to semiconductor die stacking, encapsulation, and redistribution circuit structures.

Frequently Updated Research: Researchers are constantly exploring advancements in semiconductor die stacking techniques, encapsulation materials, and redistribution circuit designs to improve performance and reliability.

Questions about Die Stack Structure: 1. What are the key components of a die stack structure? 2. How does the lateral dimension of semiconductor portions impact the design and functionality of the structure?

Original Abstract Submitted

A die stack structure including a first semiconductor die, a second semiconductor die, an insulating encapsulation and a redistribution circuit structure is provided. The first semiconductor die includes a first semiconductor substrate including a first portion and a second portion, a first interconnect structure and a first bonding structure. The first interconnect structure is disposed on a top surface of the second portion, a lateral dimension of the first portion is greater than a lateral dimension of the top surface of the second portion. The second semiconductor die is disposed on the first semiconductor die and includes a second bonding structure, the second semiconductor die is electrically connected with the first semiconductor die through the first and second bonding structures. The insulating encapsulation is disposed on the first portion and laterally encapsulating the second portion and the second semiconductor die. The redistribution circuit structure is electrically connected with the first and second semiconductor dies, and the lateral dimension of the first portion is greater than a lateral dimension of the redistribution circuit structure.