18614544. DRIVING CIRCUIT simplified abstract (Samsung Display Co., Ltd.)

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DRIVING CIRCUIT

Organization Name

Samsung Display Co., Ltd.

Inventor(s)

Kyungho Kim of Yongin-si (KR)

Sangyong No of Yongin-si (KR)

DRIVING CIRCUIT - A simplified explanation of the abstract

This abstract first appeared for US patent application 18614544 titled 'DRIVING CIRCUIT

The driving circuit described in the patent application consists of multiple stages, each with specific functions and connections to various input and output terminals.

  • The first control circuit in each stage is responsible for managing voltage levels at different control nodes.
  • The first output circuit generates an output signal based on the voltage levels of specific control nodes and clock signals.
  • The second output circuit produces another output signal based on different control nodes and clock signals.
  • The boosting circuit is designed to increase the voltage level of a specific control node using a dedicated clock signal.

Potential Applications: - This driving circuit can be used in various electronic devices that require precise voltage control and signal output.

Problems Solved: - The circuit addresses the need for efficient voltage management and signal processing in complex electronic systems.

Benefits: - Improved performance and reliability in electronic devices. - Enhanced control over voltage levels and signal outputs.

Commercial Applications: - This technology can be applied in industries such as telecommunications, automotive, and consumer electronics for better signal processing and control.

Questions about the driving circuit: 1. How does the boosting circuit enhance the voltage level of the control node? 2. What are the specific advantages of using multiple stages in this driving circuit design?


Original Abstract Submitted

A driving circuit includes stages, each of the stages including: a first control circuit connected to a first voltage input terminal and a second voltage input terminal, and to control voltage levels of a first control node, a second control node, and a third control node; a first output circuit connected to a first clock terminal and a third voltage input terminal, and to output a first output signal according to the voltage levels of the first control node and the second control node; a second output circuit connected to a second clock terminal and the second voltage input terminal, and to output a second output signal according to the voltage levels of the third control node and the second control node; and a boosting circuit connected to a third clock terminal and the second voltage input terminal, and to boost the voltage level of the first control node.