18602665. VIA FOR SEMICONDUCTOR DEVICE CONNECTION simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

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VIA FOR SEMICONDUCTOR DEVICE CONNECTION

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Chen-Hua Yu of Hsinchu (TW)

An-Jhih Su of Taoyuan City (TW)

Chi-Hsi Wu of Hsinchu (TW)

Wen-Chih Chiou of Zhunan Township (TW)

Tsang-Jiuh Wu of Hsinchu (TW)

Der-Chyang Yeh of Hsinchu (TW)

Ming Shih Yeh of Zhubei City (TW)

VIA FOR SEMICONDUCTOR DEVICE CONNECTION - A simplified explanation of the abstract

This abstract first appeared for US patent application 18602665 titled 'VIA FOR SEMICONDUCTOR DEVICE CONNECTION

The abstract describes a method for forming a via in a semiconductor device, involving bonding terminals of substrates, separating the substrates to form component devices, filling a gap with material, and creating a conductive via to connect the component devices.

  • Bonding terminals of substrates
  • Separating substrates to form component devices
  • Filling a gap with material
  • Creating a conductive via to connect component devices
  • Forming a top terminal to complete the connection

Potential Applications: - Semiconductor manufacturing - Electronics industry - Integrated circuit design

Problems Solved: - Efficient via formation in semiconductor devices - Improved connectivity between components

Benefits: - Enhanced device performance - Increased reliability - Simplified manufacturing process

Commercial Applications: - Semiconductor fabrication companies - Electronics manufacturers - Research institutions

Questions about Semiconductor Device Via Formation: 1. How does the method described in the patent application improve semiconductor device connectivity? 2. What are the potential implications of this innovation on the semiconductor industry?

Frequently Updated Research: - Ongoing advancements in semiconductor device manufacturing techniques - Research on novel materials for gap filling in semiconductor devices.


Original Abstract Submitted

A method for forming a via in a semiconductor device and a semiconductor device including the via are disclosed. In an embodiment, the method may include bonding a first terminal and a second terminal of a first substrate to a third terminal and a fourth terminal of a second substrate; separating the first substrate to form a first component device and a second component device; forming a gap fill material over the first component device, the second component device, and the second substrate; forming a conductive via extending from a top surface of the gap fill material to a fifth terminal of the second substrate; and forming a top terminal over a top surface of the first component device, the top terminal connecting the first component device to the fifth terminal of the second substrate through the conductive via.