18602031. CONTROLLER AND MEMORY SYSTEM simplified abstract (SK hynix Inc.)
Contents
CONTROLLER AND MEMORY SYSTEM
Organization Name
Inventor(s)
Do Hun Kim of Gyeonggi-do (KR)
CONTROLLER AND MEMORY SYSTEM - A simplified explanation of the abstract
This abstract first appeared for US patent application 18602031 titled 'CONTROLLER AND MEMORY SYSTEM
The abstract of the patent application describes a controller that utilizes Error Correction Code (ECC) encoding to enhance data reliability. The controller includes an ECC encoder, a buffer, an ECC decoder, and checkers for performing Low Density Parity Check (LDPC) encoding and syndrome check operations.
- ECC encoder adds first parity to data to generate a data set.
- Data set is encoded to generate a first parity data set.
- Buffer temporarily stores the first parity data set.
- ECC decoder decodes the first parity data set to generate a decoded data set.
- First checker performs LDPC encoding on the decoded data set to generate an LDPC data set with a second parity.
- Second checker performs a syndrome check operation on the LDPC data set including the first and second parities.
Potential Applications: - Data storage systems - Communication systems - Error correction in electronic devices
Problems Solved: - Enhancing data reliability - Improving error correction capabilities
Benefits: - Increased data integrity - Enhanced error correction efficiency
Commercial Applications: Title: "Advanced Error Correction Controller for Enhanced Data Reliability" This technology can be utilized in various industries such as data storage, telecommunications, and consumer electronics to ensure data integrity and improve error correction capabilities.
Questions about the technology: 1. How does the ECC encoder enhance data reliability? - The ECC encoder adds parity to the data, allowing for error detection and correction. 2. What are the key benefits of using LDPC encoding in the controller? - LDPC encoding helps improve error correction efficiency and enhances data integrity.
Original Abstract Submitted
A controller includes an Error Correction Code (ECC) encoder adding a first parity to data to generate a data set, and encoding the data set to generate a first parity data set, a buffer temporarily storing the first parity data set, an ECC decoder decoding the first parity data set received from the buffer to generate a decoded data set, a first checker performing a Low Density Parity Check (LDPC) encoding on the decoded data set to generate an LDPC data set to which a second parity is added, and a second checker performing a syndrome check operation on the LDCP data set including the first and second parities.
