18599986. MEMORY DEVICE simplified abstract (Kioxia Corporation)
Contents
MEMORY DEVICE
Organization Name
Inventor(s)
Akira Katayama of Yokohama Kanagawa (JP)
MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18599986 titled 'MEMORY DEVICE
The abstract describes a memory cell with multiple switches and interconnects that allow for the storage and retrieval of different voltages.
- The memory cell has a first switch connected to a first node receiving a first voltage, and a second switch connected to a second node receiving a second voltage.
- A third switch is connected between the second switch and a third interconnect, allowing for the application of a third voltage between the first and second voltages.
- The switches are turned on and off in a specific sequence to control the flow of voltages within the memory cell.
Potential Applications: - This technology could be used in electronic devices that require efficient memory storage and retrieval systems. - It may find applications in data storage devices, computer systems, and other electronic components.
Problems Solved: - The memory cell addresses the need for a compact and reliable method of storing and accessing different voltages. - It offers a solution for managing multiple voltage levels within a single memory cell.
Benefits: - Improved efficiency in memory storage and retrieval processes. - Enhanced control over voltage levels for better performance in electronic devices.
Commercial Applications: Memory cells incorporating this technology could be valuable in the development of advanced electronic devices, data storage systems, and computing technologies.
Questions about Memory Cell Technology: 1. How does the sequence of switch operations impact the functionality of the memory cell? 2. What are the potential limitations of using this technology in practical electronic devices?
Original Abstract Submitted
A memory cell includes first and second ends. A first interconnect is coupled to the first end. A first switch is coupled between the first interconnect and a first node that receives a first voltage. A second interconnect is coupled to the second end. A second switch includes a third end coupled to the second interconnect and a fourth end. A third interconnect is coupled to the fourth end. A third switch is coupled between the third interconnect and a second node that receives a second voltage different from the first voltage. A third voltage between the second and first voltages is applied to the first and second interconnects. The third and second switches are respectively turned off and on after the third switch is turned on and after the application of the third voltage. The first switch is turned off after the application of the third voltage.
