18440444. SUBSTRATES WITH DOWNSET simplified abstract (Micron Technology, Inc.)
Contents
SUBSTRATES WITH DOWNSET
Organization Name
Inventor(s)
Kelvin Aik Boo Tan of Singapore (SG)
See Hiong Leow of Singapore (SG)
Chong C. Hui of Singapore (SG)
SUBSTRATES WITH DOWNSET - A simplified explanation of the abstract
This abstract first appeared for US patent application 18440444 titled 'SUBSTRATES WITH DOWNSET
The patent application describes a system with packaged electronic devices containing multiple dies arranged on a substrate with a downset design.
- The substrate with a downset design includes an upper portion, a lower portion, and a downset portion connecting the two.
- The downset portion features through vias for conductive paths between the upper and lower portions.
- Dies are positioned within the downset portion, covered by a non-conductive film.
- Additional dies can be placed on the non-conductive film and the upper portion of the substrate.
- The design raises the neutral axis of the packaged electronic device near the top surface of the dies.
Potential Applications: - Consumer electronics - Automotive systems - Aerospace technology
Problems Solved: - Improved thermal management - Enhanced electrical connectivity - Space-saving design
Benefits: - Increased reliability - Better performance - Cost-effective manufacturing
Commercial Applications: Title: Advanced Packaging Technology for High-Performance Electronics This technology can be utilized in high-performance computing systems, telecommunications equipment, and medical devices, among others. The market implications include improved product efficiency and reduced production costs.
Questions about the technology: 1. How does the downset design contribute to the overall performance of the packaged electronic devices? 2. What are the key advantages of using a non-conductive film to cover the dies within the downset portion?
Original Abstract Submitted
A variety of applications can include systems with packaged electronic devices having multiple dies arranged on a substrate with a downset design. A substrate with a downset design can include an upper portion and a lower portion with a downset portion connecting the upper portion to the lower portion. The downset portion can include through vias to provide conductive paths between the lower portion and the upper portion. Dies can be positioned with a region defined by walls of the downset portion with a non-conductive film covering the dies in the region defined by walls of the downset portion. Additional dies can be positioned on the non-conductive film and the upper portion of the substrate. A packaged electronic device having a substrate with a downset design can be implemented to raise the neutral axis of the packaged electronic device to near the top surface of the dies.
