18440139. GATE DRIVER CIRCUIT simplified abstract (ROHM CO., LTD.)
Contents
GATE DRIVER CIRCUIT
Organization Name
Inventor(s)
Hisashi Sugie of Kyoto-shi (JP)
GATE DRIVER CIRCUIT - A simplified explanation of the abstract
This abstract first appeared for US patent application 18440139 titled 'GATE DRIVER CIRCUIT
The present disclosure introduces a gate driver circuit with innovative features for controlling high-side signals.
- External resistor connected to setting pin
- High-side dead time circuit generates control signals
- Analog delay circuit delays control signal based on resistor value
- Selector chooses between original and delayed signals based on setting pin state
Potential Applications: - Power electronics - Motor control systems - Inverters
Problems Solved: - Efficient high-side signal control - Improved dead time management
Benefits: - Enhanced circuit performance - Increased reliability - Precise signal timing
Commercial Applications: Title: Advanced Gate Driver Circuit for Power Electronics This technology can be utilized in various industries such as automotive, renewable energy, and industrial automation for improved control and efficiency in power systems.
Prior Art: Researchers can explore prior patents related to gate driver circuits, high-side control, and signal delay mechanisms to understand the evolution of this technology.
Frequently Updated Research: Researchers can stay updated on advancements in gate driver circuits, power electronics, and control systems to enhance their understanding of the field.
Questions about Gate Driver Circuit Technology: 1. How does the external resistor impact the delay time in the circuit?
- The external resistor determines the delay time by influencing the analog delay circuit's operation.
2. What are the key differences between the original and delayed high-side control signals in this circuit?
- The original signal is the immediate control signal, while the delayed signal is adjusted based on the resistor value for precise timing.
Original Abstract Submitted
The present disclosure provides a gate driver circuit. An external resistor is connected to a setting pin. A high-side dead time circuit is configured to receive a first high-side control signal and generate a second high-side control signal. An analog delay circuit is configured to delay the first high-side control signal by a delay time corresponding to a resistance value of the external resistor to generate a delayed high-side control signal. A selector is configured to receive the first high-side control signal and the delayed high-side control signal, select one according to an electrical state of the setting pin, and output the selected signal as the second high-side control signal.
