18403080. FIELD-EFFECT TRANSISTOR, AND METHOD OF PRODUCTION simplified abstract (Robert Bosch GmbH)
Contents
FIELD-EFFECT TRANSISTOR, AND METHOD OF PRODUCTION
Organization Name
Inventor(s)
Jens Baringhaus of Sindelfingen (DE)
Klaus Heyers of Reutlingen (DE)
FIELD-EFFECT TRANSISTOR, AND METHOD OF PRODUCTION - A simplified explanation of the abstract
This abstract first appeared for US patent application 18403080 titled 'FIELD-EFFECT TRANSISTOR, AND METHOD OF PRODUCTION
The abstract describes a field-effect transistor with a unique structure involving source and drain layers doped according to a first type, a channel layer between them, gate trenches extending vertically, fins formed between the gate trenches, and an additional layer doped according to a second type on the side surfaces of the fin.
- Source and drain layers doped according to a first type
- Channel layer located vertically between the source and drain layers
- Gate trenches extending vertically from the source to the drain layer
- Fins formed between each pair of gate trenches
- Channel layer formed in at least a portion of the fin
- Additional layer doped according to a second type applied to the side surfaces of the fin
Potential Applications: - Semiconductor devices - Integrated circuits - Electronics industry
Problems Solved: - Improved performance of field-effect transistors - Enhanced efficiency in electronic devices
Benefits: - Higher speed and lower power consumption in electronic devices - Increased reliability and durability of semiconductor components
Commercial Applications: - Manufacturing of advanced electronic devices - Semiconductor industry - Research and development in electronics
Questions about the technology: 1. How does the unique structure of this field-effect transistor improve its performance compared to traditional designs? 2. What specific advantages does the additional layer doped according to a second type provide in terms of transistor functionality and efficiency?
Original Abstract Submitted
A field-effect transistor. The field-effect transistor includes: a source layer doped according to a first type, a drain layer doped according to the first type, a channel layer located vertically between the source layer doped according to the first type and the drain layer doped according to the first type, and a plurality of gate trenches, which extend in the vertical direction from the source layer doped according to the first type to the drain layer doped according to the first type, wherein a fin is formed between each two gate trenches, wherein side surfaces of the fin face the gate trenches, wherein the channel layer is formed in at least a portion of the fin, and wherein an additional layer doped according to a second type is applied at least to one of the side surfaces of the fin.
