18396118. FUSE MEMORY CIRCUIT simplified abstract (ROHM CO., LTD.)

From WikiPatents
Jump to navigation Jump to search

FUSE MEMORY CIRCUIT

Organization Name

ROHM CO., LTD.

Inventor(s)

Masanobu Tsuji of Kyoto-shi (JP)

FUSE MEMORY CIRCUIT - A simplified explanation of the abstract

This abstract first appeared for US patent application 18396118 titled 'FUSE MEMORY CIRCUIT

Simplified Explanation: The patent application describes a fuse unit with a rectification element and multiple transistors for various functions.

Key Features and Innovation:

  • Fuse units with rectification elements
  • Transistors for different functions
  • Configuration for parallel coupling

Potential Applications: The technology can be used in electronic devices, power systems, and automotive applications.

Problems Solved: The technology addresses the need for efficient fuse units with additional functionalities.

Benefits: Improved safety, reliability, and performance in electronic systems.

Commercial Applications: The technology can be applied in consumer electronics, industrial equipment, and automotive systems.

Prior Art: Readers can explore prior patents related to fuse units, rectification elements, and transistor configurations.

Frequently Updated Research: Stay updated on advancements in fuse unit technology, transistor applications, and electronic system safety.

Questions about Fuse Units with Rectification Elements: 1. What are the potential safety benefits of using fuse units with rectification elements? 2. How does the configuration of transistors enhance the performance of the fuse unit?


Original Abstract Submitted

A first fuse unit and a second fuse unit each have the same configuration. A rectification element is coupled in parallel with a fuse element. A first transistor has its drain coupled to a second end of the fuse element, its source coupled to a second line, and its gate coupled to a program terminal. A second transistor has its source coupled to the second end of the fuse element, its drain coupled to the output terminal, and its gate coupled to the test terminal. A third transistor has its drain coupled to the output terminal, and its source coupled to the second line.