18343125. PC-Based Memory Permissions simplified abstract (Apple Inc.)
Contents
PC-Based Memory Permissions
Organization Name
Inventor(s)
Jeffry E. Gonion of Campbell CA (US)
Bernard J. Semeria of Palo Alto CA (US)
PC-Based Memory Permissions - A simplified explanation of the abstract
This abstract first appeared for US patent application 18343125 titled 'PC-Based Memory Permissions
Simplified Explanation
Abstract
A memory permissions model for a processor that uses the memory address and program counter of an instruction to determine its permissions. These permissions are stored in tables and can be accessed using the instruction's memory address and the address of the memory locations it accesses. This model can also utilize page tables to obtain indexes for the permissions tables. Additionally, the model can incorporate other permissions, such as execute permissions and secondary execution privileges based on instruction grouping.
Patent/Innovation Explanation
- Memory permissions model for a processor based on memory address and program counter of an instruction
- Permissions stored in tables and indexed using instruction's memory address and accessed memory locations
- Utilizes page tables to obtain indexes for permissions tables
- Incorporates other permissions like execute permissions and secondary execution privileges based on instruction grouping
Potential Applications
- Improved security and access control in processors
- Enhanced memory management and protection in operating systems
- Efficient execution of instructions based on their permissions
Problems Solved
- Ensures proper access control and security for memory operations
- Facilitates efficient memory management and protection
- Enables fine-grained control over instruction execution based on permissions
Benefits
- Enhanced security and protection against unauthorized memory access
- Improved performance and efficiency in executing instructions
- Flexibility in managing and controlling memory permissions
Original Abstract Submitted
A memory permissions model for a processor that is based on the memory address accessed by an instruction as well as the program counter of the instruction. These permissions may be stored in permissions tables and indexed using the memory addresses of the instruction and the address of the memory locations that it accesses. Those indexes may be obtained from a page table in some cases. These memory permissions may be used in conjunction with other permissions, such as execute permissions and secondary execution privileges that are based on whether the instruction belongs to a particular instruction group.
