18199553. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR PACKAGE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Choongbin Yim of Suwon-si (KR)

Gitae Park of Suwon-si (KR)

Jinwoo Park of Suwon-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18199553 titled 'SEMICONDUCTOR PACKAGE

Simplified Explanation

The abstract describes a semiconductor package that includes a redistribution layer, a sub-semiconductor package, and a second semiconductor chip. The redistribution layer has multiple redistribution patterns, while the sub-semiconductor package includes a substrate and a first semiconductor chip. The first lower surface pads of the sub-semiconductor package are overlapped and electrically connected to some of the redistribution patterns. The second semiconductor chip is located on the redistribution layer, spaced apart from the sub-semiconductor package.

  • The semiconductor package includes a redistribution layer with multiple redistribution patterns.
  • A sub-semiconductor package is present, consisting of a substrate and a first semiconductor chip.
  • The first lower surface pads of the sub-semiconductor package are overlapped and electrically connected to some of the redistribution patterns.
  • A second semiconductor chip is positioned on the redistribution layer, separate from the sub-semiconductor package.

Potential Applications:

  • This technology can be used in the manufacturing of semiconductor packages for various electronic devices, such as smartphones, tablets, and computers.
  • It can be applied in the development of advanced integrated circuits and microprocessors.

Problems Solved:

  • The technology allows for efficient electrical connections between the redistribution layer and the sub-semiconductor package, improving the overall performance and functionality of the semiconductor package.
  • It solves the problem of limited space and the need for compact designs in semiconductor packaging.

Benefits:

  • Improved electrical connectivity between different components of the semiconductor package.
  • Enhanced performance and functionality of electronic devices.
  • Compact and space-efficient designs for semiconductor packaging.


Original Abstract Submitted

A semiconductor package includes: a redistribution layer including a plurality of redistribution patterns; a sub-semiconductor package including a sub-semiconductor package substrate and a first semiconductor chip that is on the sub-semiconductor package substrate, wherein the sub-semiconductor package substrate is on the redistribution layer and includes a plurality of first lower surface pads; and a second semiconductor chip on the redistribution layer and spaced apart from the sub-semiconductor package in a horizontal direction, wherein the second semiconductor chip includes a chip pad, wherein at least some of the plurality of redistribution patterns of the redistribution layer are overlapped with and electrically connected to the plurality of first lower surface pads of the sub-semiconductor package, respectively.