18128417. SEMICONDUCTOR DEVICES simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR DEVICES
Organization Name
Inventor(s)
Kyungbin Chun of Suwon-si (KR)
SEMICONDUCTOR DEVICES - A simplified explanation of the abstract
This abstract first appeared for US patent application 18128417 titled 'SEMICONDUCTOR DEVICES
Simplified Explanation
The semiconductor device described in the patent application includes the following components:
- Substrate with an active region
- Gate structure intersecting the active region on the substrate
- Channel layers on the active region, spaced apart and surrounded by the gate structure
- Source/drain region on the active region adjacent to the gate structure and connected to the channel layers
The source/drain region consists of:
- First semiconductor layer on the side surfaces of the channel layers
- Diffusion barrier layer on the upper region of the first semiconductor layer, containing carbon
- Upper surface of the lowermost channel layer positioned between the substrate and the lower end of the diffusion barrier layer
- Second semiconductor layer on top of the diffusion barrier layer and the first semiconductor layer
Potential applications of this technology:
- Integrated circuits
- Transistors
- Semiconductor devices used in electronic devices such as smartphones, computers, and tablets
Problems solved by this technology:
- Improved performance and efficiency of semiconductor devices
- Enhanced control of current flow in the channel layers
- Reduction of leakage current and power consumption
Benefits of this technology:
- Higher speed and performance of electronic devices
- Lower power consumption and longer battery life
- Improved reliability and stability of semiconductor devices
Original Abstract Submitted
A semiconductor device is provided. The semiconductor device includes: a substrate including an active region; a gate structure intersecting the active region on the substrate; channel layers on the active region, spaced apart from each other and surrounded by the gate structure; and a source/drain region on the active region adjacent the gate structure and connected to the plurality of channel layers. The source/drain region includes: a first semiconductor layer on side surfaces of the channel layers; a diffusion barrier layer on an upper region of the first semiconductor layer and including carbon, wherein an upper surface of a first channel layer that is a lowermost channel layer among the plurality of channel layers is provided between the substrate and a lower end of the diffusion barrier layer; and a second semiconductor layer on the diffusion barrier layer and the first semiconductor layer.
