18113715. SEMICONDUCTOR DEVICE simplified abstract (Samsung Electronics Co., Ltd.)

SEMICONDUCTOR DEVICE

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Jin Kyu Kim of Suwon-si (KR)

Yun Suk Nam of Suwon-si (KR)

Kyoung Woo Lee of Suwon-si (KR)

Ho-Jun Kim of Suwon-si (KR)

Da Rong Oh of Suwon-si (KR)

Sung Moon Lee of Suwon-si (KR)

Hag Ju Cho of Suwon-si (KR)

Seung Min Cha of Suwon-si (KR)

SEMICONDUCTOR DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18113715 titled 'SEMICONDUCTOR DEVICE

Simplified Explanation

The abstract describes a semiconductor device that includes various components such as a base substrate, interlayer insulating layers, power rails, active patterns, gate electrodes, gate cuts, and power rail vias.

• The device has a base substrate and a first interlayer insulating layer on top of it.
• A power rail is located within the first interlayer insulating layer.
• An active pattern is placed on the first interlayer insulating layer, extending in a horizontal direction.
• A gate electrode is positioned on top of the active pattern, extending in a different horizontal direction.
• A gate cut is present on the power rail, separating the gate electrode.
• Inside the gate cut, there is a power rail via that is overlapped by the power rail.

Potential applications of this technology:

• Semiconductor manufacturing industry
• Electronics industry
• Integrated circuit design and production

Problems solved by this technology:

• Simplifies the design and layout of semiconductor devices
• Provides a more efficient and compact arrangement of components
• Reduces the complexity of manufacturing processes

Benefits of this technology:

• Improved performance and functionality of semiconductor devices
• Enhanced reliability and durability
• Cost-effective production and manufacturing processes

Original Abstract Submitted

A semiconductor device includes: a base substrate; a first interlayer insulating layer disposed on the base substrate; a power rail disposed inside the first interlayer insulating layer; an active pattern extended in a first horizontal direction and disposed on the first interlayer insulating layer; a gate electrode extended in a second horizontal direction different from the first horizontal direction and disposed on the active pattern; a gate cut extended in the first horizontal direction and disposed on the power rail, wherein the gate cut separates the gate electrode; and a power rail via disposed inside the gate cut, wherein the power rail via is overlapped by the power rail.