18090608. MEMORY SYSTEM PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract (Yangtze Memory Technologies Co., Ltd.)
Contents
- 1 MEMORY SYSTEM PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 MEMORY SYSTEM PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 How does this technology compare to existing memory system package structures in terms of performance and efficiency?
- 1.11 What are the potential challenges in implementing this memory system package structure on a large scale for commercial production?
- 1.12 Original Abstract Submitted
MEMORY SYSTEM PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
Organization Name
Yangtze Memory Technologies Co., Ltd.
Inventor(s)
MEMORY SYSTEM PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 18090608 titled 'MEMORY SYSTEM PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
Simplified Explanation
The memory system package structure described in the patent application includes a memory chip, a memory controller, and a redistribution layer. The memory chip has a first surface, the memory controller is positioned on this surface, and the redistribution layer is placed on a side of the memory controller facing away from the memory chip. The memory chip and the memory controller are electrically connected through the redistribution layer.
- Memory system package structure:
- Includes memory chip, memory controller, and redistribution layer - Memory chip has a first surface - Memory controller positioned on the first surface - Redistribution layer placed on a side of the memory controller facing away from the memory chip - Memory chip and memory controller electrically connected through redistribution layer
Potential Applications
The technology described in this patent application could be applied in: - Memory modules for computers and servers - Solid-state drives (SSDs) - Mobile devices such as smartphones and tablets
Problems Solved
This technology helps in: - Improving memory system performance - Enhancing data transfer speeds - Reducing power consumption
Benefits
The benefits of this technology include: - Higher efficiency in data processing - Increased reliability of memory systems - Compact design for space-saving in devices
Potential Commercial Applications
The potential commercial applications of this technology could be seen in: - Memory chip manufacturing companies - Electronics manufacturers - Data storage solution providers
Possible Prior Art
One possible prior art for this technology could be the use of redistribution layers in semiconductor packaging to improve electrical connections between components.
Unanswered Questions
How does this technology compare to existing memory system package structures in terms of performance and efficiency?
The patent application does not provide a direct comparison with existing memory system package structures, so it is unclear how this technology stands out in terms of performance and efficiency.
What are the potential challenges in implementing this memory system package structure on a large scale for commercial production?
The patent application does not address the potential challenges in implementing this technology on a large scale for commercial production, leaving room for uncertainty regarding the scalability and practicality of the innovation.
Original Abstract Submitted
A memory system package structure and a manufacturing method thereof are disclosed. For example, the memory system package structure can include a memory chip, a memory controller and a distribution layer. The memory chip can include a first surface. The memory controller can be positioned on the first surface. The redistribution layer can be positioned on a side of the memory controller facing away from the memory chip. The memory chip and the memory controller can be electrically connected with the redistribution layer.