17808392. Tiled Processor Communication Fabric simplified abstract (Apple Inc.)
Contents
Tiled Processor Communication Fabric
Organization Name
Inventor(s)
Adam J. Smith of St Albans (GB)
Christopher G. Martin of Cupertino CA (US)
Yoong Chert Foo of Greater London (GB)
Terence M. Potter of Austin TX (US)
Tiled Processor Communication Fabric - A simplified explanation of the abstract
This abstract first appeared for US patent application 17808392 titled 'Tiled Processor Communication Fabric
Simplified Explanation
The patent application describes techniques for processor communications fabrics. It introduces a processor with multiple client circuitry and fabric circuitry that includes instances of a tile. The tile has client inputs, tile inputs, and communication resources. The communication resources consist of internal links, client outputs, and tile outputs. Control circuitry assigns communication resources to the client inputs and tile inputs based on priority information and updates the priority information based on assignment results over multiple cycles.
- The patent application describes a processor with multiple client circuitry and fabric circuitry that includes instances of a tile.
- The tile has client inputs, tile inputs, and communication resources.
- The communication resources include internal links, client outputs, and tile outputs.
- Control circuitry assigns communication resources to the client inputs and tile inputs based on priority information.
- The priority information is updated based on assignment results over multiple cycles.
Potential Applications
- This technology can be applied in various processor designs, including CPUs, GPUs, and other types of processors.
- It can improve the efficiency and performance of processor communications, leading to faster and more reliable data transfer.
Problems Solved
- Traditional processor communications fabrics may suffer from inefficiencies and bottlenecks, leading to slower data transfer and reduced performance.
- The patent application addresses these problems by introducing a system that dynamically assigns communication resources based on priority information, optimizing the data transfer process.
Benefits
- The techniques described in the patent application can improve the overall performance and efficiency of processors.
- By dynamically assigning communication resources, the system can prioritize critical data transfer and reduce bottlenecks.
- The technology can lead to faster and more reliable data transfer within processors, enhancing the overall functionality of computing systems.
Original Abstract Submitted
Techniques are disclosed relating to processor communications fabrics. In some embodiments, a processor includes multiple client circuitry and fabric circuitry that includes at least first and second instances of a tile. The tile may include: client inputs configured to interface with client circuits, tile inputs configured to interface with one or more other tile instances, and communication resources assignable to the client inputs and tile inputs. The communications resources may include: multiple internal links, client outputs configured to interface with client circuits, and tile outputs configured to interface with one or more other tile instances. Control circuitry may, in a given cycle, assign communication resources of a given tile instance to at least a portion of the client inputs and tile inputs for a next cycle, based on priority information. The control circuitry may update priority information based on assignment results over multiple cycles.
