17543964. BEOL INTERCONNECT SUBTRACTIVE ETCH SUPER VIA simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)
Contents
BEOL INTERCONNECT SUBTRACTIVE ETCH SUPER VIA
Organization Name
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor(s)
Prasad Bhosale of Albany NY (US)
Nicholas Anthony Lanzillo of Wynantskill NY (US)
Lawrence A. Clevenger of Saratoga Springs NY (US)
Michael Rizzolo of Delmar NY (US)
BEOL INTERCONNECT SUBTRACTIVE ETCH SUPER VIA - A simplified explanation of the abstract
This abstract first appeared for US patent application 17543964 titled 'BEOL INTERCONNECT SUBTRACTIVE ETCH SUPER VIA
Simplified Explanation
The abstract describes a semiconductor device that includes a super via connection between different levels. Here is a simplified explanation of the abstract:
- The semiconductor device has multiple interlevel dielectric layers.
- A back-end-of-line (BEOL) interconnect structure is present in the first interlevel dielectric layer.
- A second interlevel dielectric layer is placed on a portion of the first interlevel dielectric layer.
- A third interlevel dielectric layer is placed on top of the second interlevel dielectric layer.
- A super via is located on another portion of the first interlevel dielectric layer.
- One end of the super via is connected to the BEOL interconnect structures.
- The other end of the super via is positioned at a distance from the first interlevel dielectric layer, which is greater than the height of the second interlevel dielectric layer.
Potential applications of this technology:
- Semiconductor manufacturing industry
- Integrated circuit design and fabrication
- Electronic devices and systems
Problems solved by this technology:
- Efficiently connecting different levels in a semiconductor device
- Overcoming limitations of traditional via connections
- Improving interconnect density and performance
Benefits of this technology:
- Enhanced functionality and performance of semiconductor devices
- Increased interconnect density and integration capabilities
- Improved reliability and signal transmission efficiency
Original Abstract Submitted
Semiconductor devices including a super via connection between levels are provided. The semiconductor device can include a first interlevel dielectric layer, a back-end-of-line (BEOL) interconnect structure disposed in the first interlevel dielectric layer, a second interlevel dielectric layer disposed on a first portion of the first interlevel dielectric layer, a third interlevel dielectric layer disposed on the second interlevel dielectric layer, and a super via disposed on a second portion of the first interlevel dielectric layer, wherein a first end of the super via is connected to the BEOL interconnect structures and wherein a second end of the super via opposite the first end of the super via is a distance from the first interlevel dielectric layer larger than a height distance of the second interlevel dielectric layer.