18400614. POWER MANAGEMENT AND DELIVERY FOR HIGH BANDWIDTH MEMORY simplified abstract (Micron Technology, Inc.)
Contents
POWER MANAGEMENT AND DELIVERY FOR HIGH BANDWIDTH MEMORY
Organization Name
Inventor(s)
Rajesh H. Kariya of Boise ID (US)
POWER MANAGEMENT AND DELIVERY FOR HIGH BANDWIDTH MEMORY - A simplified explanation of the abstract
This abstract first appeared for US patent application 18400614 titled 'POWER MANAGEMENT AND DELIVERY FOR HIGH BANDWIDTH MEMORY
The abstract describes methods, systems, and devices for power management and delivery for high bandwidth memory (HBM) devices. These devices may include a power management integrated circuit (PMIC) and a voltage regulator integrated within the HBM system.
- A high bandwidth memory (HBM) device may include a power management integrated circuit (PMIC) and a voltage regulator integrated within an interface die of the HBM system or included as a separate chip within the HBM system stack.
- The HBM system may be supplied a higher voltage and regulate the voltage to a desired power level, increasing the total power available without increasing the quantity of microbumps.
- Ground voltage, positive voltage, or both, may be supplied to the HBM device via a back interface, reducing the quantity of microbumps at a front interface.
- A modified heatsink assembly may supply the ground voltage, positive voltage, or both, to the HBM system.
Potential Applications: - High-performance computing systems - Data centers - Graphics processing units (GPUs)
Problems Solved: - Efficient power management for high bandwidth memory devices - Reduction of microbumps in the HBM system
Benefits: - Increased power availability without additional microbumps - Improved efficiency in power management
Commercial Applications: Title: Power Management Solutions for High Bandwidth Memory Devices This technology could be utilized in high-performance computing systems, data centers, and GPUs to enhance power management efficiency and performance.
Questions about Power Management Solutions for High Bandwidth Memory Devices: 1. How does the integration of a power management integrated circuit (PMIC) within the HBM system improve power delivery? 2. What are the potential cost-saving benefits of reducing the quantity of microbumps in the HBM system?
Original Abstract Submitted
Methods, systems, and devices for power management and delivery for high bandwidth memory are described. A high bandwidth memory (HBM) device may include a power management integrated circuit (PMIC) and a voltage regulator integrated within an interface die of the HBM system or included as a separate chip within the HBM system stack. Accordingly, the HBM system may be supplied a higher voltage and may regulate the voltage to a desired power level, which may increase the total power available to the HBM system without increasing the quantity of microbumps. Additionally, a ground voltage, a positive voltage, or both, may be supplied to the HBM device via a back interface of the HBM device, which may reduce the quantity of microbumps at a front interface. In some examples, a modified heatsink assembly may supply the ground voltage, the positive voltage, or both, to the HBM system.
