Intel corporation (20240210470). SCAN CHAIN DIAGNOSTIC ACCURACY USING HIGH VOLUME MANUFACTURING FUNCTIONAL TESTING simplified abstract
Contents
SCAN CHAIN DIAGNOSTIC ACCURACY USING HIGH VOLUME MANUFACTURING FUNCTIONAL TESTING
Organization Name
Inventor(s)
David Turjeman of Zikhron Ya'akov (IL)
Hussein Deeb of Judaida Macker (IL)
SCAN CHAIN DIAGNOSTIC ACCURACY USING HIGH VOLUME MANUFACTURING FUNCTIONAL TESTING - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240210470 titled 'SCAN CHAIN DIAGNOSTIC ACCURACY USING HIGH VOLUME MANUFACTURING FUNCTIONAL TESTING
- Simplified Explanation:**
This patent application describes a system for diagnosing and isolating a broken cell in a scan chain by performing functional tests on CPU cells, capturing results in flip-flops, and utilizing the data to identify the faulty cell.
- Key Features and Innovation:**
- Diagnosing and isolating broken cells in a scan chain.
- Performing functional tests on CPU cells.
- Propagating data through combinatoric logic.
- Capturing results in sequential flip-flops associated with scan.
- Utilizing shifted-out data to isolate the faulty cell.
- Potential Applications:**
This technology can be used in the semiconductor industry for testing and diagnosing faults in integrated circuits, specifically in CPU cells and scan chains.
- Problems Solved:**
This technology addresses the challenge of identifying and isolating broken cells in a scan chain efficiently and accurately, reducing the time and effort required for troubleshooting.
- Benefits:**
- Improved diagnostic capabilities for identifying faulty cells.
- Enhanced efficiency in isolating broken cells in a scan chain.
- Streamlined testing processes for integrated circuits.
- Commercial Applications:**
The technology can be applied in semiconductor manufacturing companies to enhance the quality control processes for integrated circuits, leading to improved product reliability and reduced production costs.
- Prior Art:**
Prior research in the field of semiconductor testing and fault diagnosis may provide insights into similar methods and technologies used for identifying broken cells in scan chains.
- Frequently Updated Research:**
Stay updated on advancements in semiconductor testing methodologies and fault diagnosis techniques to leverage the latest innovations in the field.
- Questions about the Technology:**
1. How does this technology improve the efficiency of diagnosing broken cells in a scan chain? 2. What are the potential applications of this technology beyond semiconductor testing?
Original Abstract Submitted
this disclosure describes systems, methods, and devices related to diagnose a broken scan chain and isolate the broken cell. a device may perform a functional test on a plurality of central processing unit (cpu) cells in a chain. the device may propagate data through a combinatoric logic. the device may capture results in sequential flip-flops associated with scan. the device may utilize the results in a next combinatoric logic. the device may utilize shifted-out data to isolate a first broken cell based on the functional test.
