18454507. APPARATUS AND METHOD FOR MONITORING DUTY CYCLE OF MEMORY CLOCK SIGNAL simplified abstract (ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE)
Contents
APPARATUS AND METHOD FOR MONITORING DUTY CYCLE OF MEMORY CLOCK SIGNAL
Organization Name
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
Inventor(s)
Young-Deuk Jeon of Sejong-si (KR)
APPARATUS AND METHOD FOR MONITORING DUTY CYCLE OF MEMORY CLOCK SIGNAL - A simplified explanation of the abstract
This abstract first appeared for US patent application 18454507 titled 'APPARATUS AND METHOD FOR MONITORING DUTY CYCLE OF MEMORY CLOCK SIGNAL
The patent application describes an apparatus and method for monitoring the duty cycle of a memory clock signal. The apparatus includes a clock frequency converter that generates a second monitoring target clock signal by decreasing the frequency of a first monitoring target clock signal while maintaining its duty cycle, and a pulse counter that measures the pulse width of the second monitoring target clock signal using a reference clock signal.
- Clock frequency converter decreases frequency of monitoring target clock signal
- Duty cycle of monitoring target clock signal is maintained
- Pulse counter measures pulse width of second monitoring target clock signal
- Reference clock signal is used for measurement
Potential Applications: - Memory clock signal monitoring in electronic devices - Performance optimization in memory systems - Quality control in memory clock signal production
Problems Solved: - Accurate monitoring of duty cycle in memory clock signals - Efficient measurement of pulse width for analysis - Improved reliability of memory clock signal performance
Benefits: - Enhanced accuracy in monitoring memory clock signals - Increased efficiency in analyzing pulse width - Improved overall performance and reliability of memory systems
Commercial Applications: Title: "Memory Clock Signal Monitoring System for Electronic Devices" This technology can be utilized in: - Computer systems - Mobile devices - Networking equipment - Industrial control systems
Questions about Memory Clock Signal Monitoring: 1. How does the clock frequency converter maintain the duty cycle of the monitoring target clock signal? 2. What are the potential challenges in implementing this monitoring system in different electronic devices?
Original Abstract Submitted
Disclosed herein are an apparatus and method for monitoring the duty cycle of a memory clock signal. The apparatus for monitoring a duty cycle of a memory clock signal includes a clock frequency converter configured to generate a second monitoring target clock signal by decreasing a frequency of a first monitoring target clock signal while maintaining a duty cycle of the first monitoring target clock signal, and a pulse counter configured to measure a pulse width of the second monitoring target clock signal using a reference clock signal.
