Micron technology, inc. (20240185897). Assemblies Comprising Memory Cells and Select Gates; and Methods of Forming Assemblies simplified abstract

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Assemblies Comprising Memory Cells and Select Gates; and Methods of Forming Assemblies

Organization Name

micron technology, inc.

Inventor(s)

Ugo Russo of Boise ID (US)

Assemblies Comprising Memory Cells and Select Gates; and Methods of Forming Assemblies - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240185897 titled 'Assemblies Comprising Memory Cells and Select Gates; and Methods of Forming Assemblies

The patent application describes an assembly with alternating dielectric and conductive levels, channel material pillars, memory cells, an insulative level, and a select gate configuration.

  • The assembly includes a stack of alternating dielectric and conductive levels.
  • Channel material pillars extend through the stack, with some associated with a first sub-block and others with a second sub-block.
  • Memory cells are located along the channel material pillars.
  • An insulative level and a select gate configuration are positioned over the stack.
  • The select gate configuration consists of a first conductive gate structure associated with the first sub-block and a second conductive gate structure associated with the second sub-block.
  • The first and second conductive gate structures are laterally spaced from each other by an intervening insulative region.
  • The first and second conductive gate structures have vertically-spaced conductive regions and vertically-extending conductive structures that electrically couple the vertically-spaced conductive regions.

Potential Applications: - Memory storage devices - Semiconductor manufacturing - Integrated circuits

Problems Solved: - Efficient memory cell organization - Enhanced data storage capabilities - Improved semiconductor performance

Benefits: - Increased memory density - Faster data access speeds - Enhanced overall device performance

Commercial Applications: Title: Advanced Memory Storage Technology for Semiconductor Industry This technology can be utilized in the development of high-performance memory storage devices for various commercial applications in the semiconductor industry, leading to improved data processing capabilities and enhanced device efficiency.

Prior Art: There is ongoing research in the field of semiconductor memory technologies, with advancements being made in memory cell design and organization to improve data storage and access speeds.

Frequently Updated Research: Researchers are continuously exploring new methods to enhance memory cell performance and increase memory density in semiconductor devices. Stay updated on the latest developments in memory storage technologies to leverage cutting-edge advancements in the industry.

Questions about Memory Storage Technology: 1. How does this assembly improve memory cell organization compared to traditional semiconductor designs? 2. What are the potential implications of using channel material pillars in memory storage devices?


Original Abstract Submitted

some embodiments include an assembly having a stack of alternating dielectric levels and conductive levels. channel material pillars extend through the stack. some of the channel material pillars are associated with a first sub-block, and others of the channel material pillars are associated with a second sub-block. memory cells are along the channel material pillars. an insulative level is over the stack. a select gate configuration is over the insulative level. the select gate configuration includes a first conductive gate structure associated with the first sub-block, and includes a second conductive gate structure associated with the second sub-block. the first and second conductive gate structures are laterally spaced from one another by an intervening insulative region. the first and second conductive gate structures have vertically-spaced conductive regions, and have vertically-extending conductive structures which electrically couple the vertically-spaced conductive regions to one another. some embodiments include methods of forming assemblies.