18351205. THREE-DIMENSIONAL MEMORY DEVICE CONTAINING ENGINEERED CHARGE STORAGE ELEMENTS AND METHODS FOR FORMING THE SAME simplified abstract (SanDisk Technologies LLC)

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THREE-DIMENSIONAL MEMORY DEVICE CONTAINING ENGINEERED CHARGE STORAGE ELEMENTS AND METHODS FOR FORMING THE SAME

Organization Name

SanDisk Technologies LLC

Inventor(s)

Rahul Sharangpani of Fremont CA (US)

Raghuveer S. Makala of Campbell CA (US)

Adarsh Rajashekhar of Santa Clara CA (US)

Fei Zhou of San Jose CA (US)

THREE-DIMENSIONAL MEMORY DEVICE CONTAINING ENGINEERED CHARGE STORAGE ELEMENTS AND METHODS FOR FORMING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18351205 titled 'THREE-DIMENSIONAL MEMORY DEVICE CONTAINING ENGINEERED CHARGE STORAGE ELEMENTS AND METHODS FOR FORMING THE SAME

Simplified Explanation

The semiconductor structure described in the abstract consists of an alternating stack of insulating layers and electrically conductive layers, with a memory opening that extends vertically through the stack. Within the memory opening, there is a memory opening fill structure containing a vertical semiconductor channel and a memory film. The memory film includes a tunneling dielectric layer, a continuous charge storage material layer that extends vertically through multiple electrically conductive layers, a vertical stack of discrete charge storage elements at different levels of the electrically conductive layers, and a vertical stack of discrete blocking dielectric material portions containing silicon and oxygen atoms.

  • The semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers.
  • A memory opening extends vertically through the alternating stack.
  • The memory opening fill structure contains a vertical semiconductor channel and a memory film.
  • The memory film consists of a tunneling dielectric layer and a continuous charge storage material layer.
  • A vertical stack of discrete charge storage elements is located at different levels of the electrically conductive layers.
  • A vertical stack of discrete blocking dielectric material portions, containing silicon and oxygen atoms, is spaced apart from each other at the levels of the electrically conductive layers.

Potential Applications

This technology could be applied in:

  • Non-volatile memory devices
  • Semiconductor manufacturing

Problems Solved

This technology helps in:

  • Improving memory storage capacity
  • Enhancing data retention in memory devices

Benefits

The benefits of this technology include:

  • Increased memory density
  • Enhanced performance of memory devices

Potential Commercial Applications

This technology has potential commercial applications in:

  • Consumer electronics
  • Data storage devices

Possible Prior Art

One possible prior art for this technology could be:

  • Floating gate memory structures

Unanswered Questions

How does this technology compare to existing memory storage solutions?

This technology offers higher memory density and improved data retention compared to traditional memory storage solutions.

What are the potential challenges in implementing this technology on a large scale?

Some potential challenges in implementing this technology on a large scale could include manufacturing complexity and cost considerations.


Original Abstract Submitted

A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and containing a vertical semiconductor channel and a memory film. The memory film includes a tunneling dielectric layer, a continuous charge storage material layer vertically extending through a plurality of the electrically conductive layers, a vertical stack of discrete charge storage elements located at levels of the electrically conductive layers and contacting a respective surface segment of an outer sidewall of the continuous charge storage material layer, and a vertical stack of discrete blocking dielectric material portions containing silicon atoms and oxygen atoms and located at the levels of the electrically conductive layers and vertically spaced apart from each other.