18354269. STAIRLESS THREE-DIMENSIONAL MEMORY DEVICE AND METHOD OF MAKING THE SAME BY FORMING REPLACEMENT WORD LINES simplified abstract (SanDisk Technologies LLC)
Contents
- 1 STAIRLESS THREE-DIMENSIONAL MEMORY DEVICE AND METHOD OF MAKING THE SAME BY FORMING REPLACEMENT WORD LINES
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 STAIRLESS THREE-DIMENSIONAL MEMORY DEVICE AND METHOD OF MAKING THE SAME BY FORMING REPLACEMENT WORD LINES - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
STAIRLESS THREE-DIMENSIONAL MEMORY DEVICE AND METHOD OF MAKING THE SAME BY FORMING REPLACEMENT WORD LINES
Organization Name
Inventor(s)
Akihiro Tobioka of Nagoya (JP)
Takayuki Maekura of Yokkaichi (JP)
STAIRLESS THREE-DIMENSIONAL MEMORY DEVICE AND METHOD OF MAKING THE SAME BY FORMING REPLACEMENT WORD LINES - A simplified explanation of the abstract
This abstract first appeared for US patent application 18354269 titled 'STAIRLESS THREE-DIMENSIONAL MEMORY DEVICE AND METHOD OF MAKING THE SAME BY FORMING REPLACEMENT WORD LINES
Simplified Explanation
The patent application describes a method for forming memory opening fill structures by alternating insulating layers and sacrificial material layers, replacing the sacrificial material layers with electrically conductive layers, and providing electrical contacts to the electrically conductive layers.
- Formation of alternating stack of insulating layers and sacrificial material layers
- Creation of memory openings through the alternating stack
- Formation of memory opening fill structures with vertical stack of memory elements
- Replacement of sacrificial material layers with electrically conductive layers
- Providing electrical contacts to the electrically conductive layers through integrated layer-and-via structures or integrated line-and-via structures
Potential Applications
This technology could be applied in the manufacturing of advanced memory devices, such as non-volatile memory or flash memory.
Problems Solved
This technology solves the problem of efficiently forming memory opening fill structures with electrically conductive layers and providing reliable electrical contacts in memory devices.
Benefits
The benefits of this technology include improved performance and reliability of memory devices, as well as potentially reducing manufacturing costs.
Potential Commercial Applications
One potential commercial application of this technology could be in the production of high-density memory chips for use in consumer electronics and data storage devices.
Possible Prior Art
Prior art in the field of semiconductor manufacturing processes may include methods for forming memory structures and providing electrical contacts in integrated circuits.
Unanswered Questions
How does this technology compare to existing methods for forming memory opening fill structures?
This article does not provide a direct comparison to existing methods for forming memory opening fill structures, leaving the reader to wonder about the specific advantages and disadvantages of this new approach.
What are the specific materials used in the insulating layers and sacrificial material layers in this process?
The article does not specify the exact materials used in the insulating layers and sacrificial material layers, leaving a gap in understanding the composition of the alternating stack.
Original Abstract Submitted
An alternating stack of insulating layers and sacrificial material layers is formed over a substrate, memory openings are formed through the alternating stack, and memory opening fill structures including a respective vertical stack of memory elements are formed in the memory openings. The sacrificial material layers are replaced with electrically conductive layers. Electrical contacts to the electrically conductive layers may be provided by forming integrated layer-and-via structures that simultaneously forms metallic via portions as an integral portion of a continuous electrically conductive structure that includes a respective electrically conductive layer. Alternatively, electrical contacts to the electrically conductive layers may be provided by forming integrated line-and-via structures that includes a metallic plate portion contacting a respective electrically conductive layer and a metallic via portion.
