ORDERING NODES FOR TENSOR NETWORK CONTRACTION BASED QUANTUM COMPUTING SIMULATION

Abstract: a classical computer includes a classical processor and a classical memory coupled to the classical processor. the classical memory includes a gate-graph conversion array, which itself includes at least one correspondence between a conversion quantum gate and a conversion graphical representation. the classical memory further includes classical programming in the classical memory. execution of the classical programming configures the classical computer to perform the following functions. receive a plurality of quantum circuit input files, where each quantum circuit input file includes a quantum circuit comprising an input quantum gate. convert each quantum circuit into a tensor graph by utilizing the gate-graph conversion array. evaluate the tensor graph as a contraction tree. output a selected quantum circuit input file of the plurality of quantum circuit input files, with a potential to demonstrate quantum advantage over one or more non-selected quantum circuit input files of the plurality of quantum circuit input files.

Inventor(s): Ilya SAFRO, Cameron IBRAHIM, Yuri ALEXEEV, Danil LYKOV

CPC Classification: G06N10/80 (Quantum programming, e.g. interfaces, languages or software-development kits for creating or handling programs capable of running on quantum computers; Platforms for simulating or accessing quantum computers, e.g. cloud-based quantum computing)

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