18514975. ELECTRONIC DEVICE, OPERATING METHOD THEREOF, AND ELECTRONIC SYSTEM simplified abstract (Samsung Electronics Co., Ltd.)

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ELECTRONIC DEVICE, OPERATING METHOD THEREOF, AND ELECTRONIC SYSTEM

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Youngho Choi of Suwon-si (KR)

Donghyuk Lim of Suwon-si (KR)

Kibaek Kwon of Suwon-si (KR)

ELECTRONIC DEVICE, OPERATING METHOD THEREOF, AND ELECTRONIC SYSTEM - A simplified explanation of the abstract

This abstract first appeared for US patent application 18514975 titled 'ELECTRONIC DEVICE, OPERATING METHOD THEREOF, AND ELECTRONIC SYSTEM

Simplified Explanation

The abstract describes an electronic device that includes a sampling circuit, a comparator, a phase detector, and a digitally controlled oscillator to vary the frequency of a clock signal based on the detection signal.

  • The device generates a sampling signal by sampling an input signal in response to clock signal edges.
  • A comparator compares the sampling signal voltage level with a reference voltage level to generate a logic decision signal.
  • An analog bang-bang phase detector executes an XOR operation on successive samples of the logic decision signal.
  • A digitally controlled oscillator adjusts the clock signal frequency based on the detection signal.

Potential Applications

The technology described in the patent application could be applied in various fields such as telecommunications, data communication, radar systems, and frequency synthesis.

Problems Solved

This technology addresses the need for precise frequency control and synchronization in electronic devices, ensuring accurate data transmission and signal processing.

Benefits

The benefits of this technology include improved signal accuracy, reduced signal interference, enhanced data transmission efficiency, and increased overall system performance.

Potential Commercial Applications

  • "Frequency Control Technology for Enhanced Data Transmission Efficiency and Signal Accuracy"

Possible Prior Art

One possible prior art could be the use of phase-locked loops (PLLs) in electronic devices for frequency synthesis and synchronization.

Unanswered Questions

How does the device handle variations in input signal amplitude?

The abstract does not provide information on how the device compensates for changes in input signal strength that may affect the sampling and detection processes.

What is the power consumption of the device?

The abstract does not mention the power requirements or efficiency of the electronic device, which could be crucial for practical applications.


Original Abstract Submitted

An electronic device includes a first sample circuit configured to generate a first sampling signal by sampling an input signal in response to edges of a clock signal, a first comparator configured to generate a first logic decision signal by comparing a voltage level of the first sampling signal with a reference voltage level, an analog bang-bang phase detector configured to generate a first detection signal by executing an exclusive OR (XOR) operation on successive samples of the first logic decision signal, and a digitally controlled oscillator configured to vary a frequency of the clock signal according to the first detection signal.