TEXAS INSTRUMENTS INCORPORATED patent applications on May 30th, 2024
Patent Applications by TEXAS INSTRUMENTS INCORPORATED on May 30th, 2024
TEXAS INSTRUMENTS INCORPORATED: 34 patent applications
TEXAS INSTRUMENTS INCORPORATED has applied for patents in the areas of H01L21/56 (7), H01L23/00 (7), H01L23/31 (5), H03K17/687 (4), G01S13/931 (4)
With keywords such as: coupled, circuit, output, input, having, die, semiconductor, terminal, conductive, and current in patent application abstracts.
Patent Applications by TEXAS INSTRUMENTS INCORPORATED
Inventor(s): Kar Hou Chai of Kuala Lumpur (MY) for texas instruments incorporated
IPC Code(s): G01R31/28, G01R27/02
Abstract: one example includes a method for trimming a reference voltage in an integrated circuit (ic). the method includes fabricating the ic that is configured to generate the reference voltage based on a circuit design. the fabricated ic includes a pair of conductive input/output (i/o) leads and a resistance test switch system coupled between the conductive i/o leads. the method also includes coupling the conductive i/o leads of the fabricated ic to a circuit test fixture and setting the resistance test switch system to a test mode via automated testing equipment (ate) associated with the circuit test fixture. the method also includes providing a test signal to the conductive i/o leads and measuring a resistance between the conductive i/o leads in response to the test signal. the method further includes trimming the reference voltage based on the measured resistance.
20240175977.RADAR TRANSCEIVER_simplified_abstract_(texas instruments incorporated)
Inventor(s): Sreekiran SAMALA of Plano TX (US) for texas instruments incorporated, Venkatesh SRINIVASAN of Plano TX (US) for texas instruments incorporated, Vijaya B. RENTALA of Plano TX (US) for texas instruments incorporated
IPC Code(s): G01S7/03, G01S7/35, G01S13/931
Abstract: a device, e.g., a radar transceiver, includes a receiver and a transmitter. one such device includes a phase shifter having a first input to receive an oscillating signal and a second input to receive a control signal. the device also includes a signal generator having a quadrature (q) channel output to output a quadrature phase version of the oscillating signal; and a q channel mixer having an input coupled to the q channel output. a feedback path of the device includes a filter having an output and an input coupled to an output of the q channel mixer, and an integrator having an input coupled to the output of the filter. the integrator has an output coupled to the second input of the phase shifter, in which the integrator outputs the control signal to the phase shifter.
Inventor(s): Dan WANG of Shanghai (CN) for texas instruments incorporated, Sandeep RAO of Bangalore (IN) for texas instruments incorporated, Adeel AHMAD of Plano TX (US) for texas instruments incorporated
IPC Code(s): G01S13/931, G01S7/288, G01S13/34, G01S13/44, G01S13/58, H04B7/212
Abstract: a radar system includes a set of transmitters and a processor coupled to the set of transmitters, which includes first, second, third and fourth transmitters. in operation, the processor generates a first chirp of a set of chirps, in which outputs of the first and second transmitters are modulated by a first phase and outputs of the third and fourth transmitters are modulated by a second phase; and generate a second chirp of the set of chirps, in which outputs of the first and fourth transmitters are modulated by the first phase and outputs of the second and third transmitters are modulated by the second phase.
Inventor(s): Mihir Narendra Mody of Bangalore (IN) for texas instruments incorporated, Prithvi Shankar Yeyyadi Anantha of Bangalore (IN) for texas instruments incorporated, Mel Alan Phipps of Sugar Land TX (US) for texas instruments incorporated, Prasad Jondhale of Bangalore (IN) for texas instruments incorporated, Mohd Asif Farooqui of Bangalore (IN) for texas instruments incorporated, Shailesh Ghotgalkar of Bangalore (IN) for texas instruments incorporated
IPC Code(s): G06F3/06
Abstract: various examples disclosed herein relate to allocation of code and data of application software among memory of a microcontroller unit (mcu), and more particularly to allocating portions of the application software to random access memory or flash memory of an mcu based on information associated with of each portion of the application software. a method is provided herein that comprises instructing an mcu to execute an application software. the method further comprises obtaining information indicative of a performance of portions of the application software on the mcu and capacity requirements of the portions of the application software, and designating, based on the information, each of the portions of the application software for execution from either a first memory or a second memory when deployed to one or more mcus.
20240176620.LOOK-UP TABLE WRITE_simplified_abstract_(texas instruments incorporated)
Inventor(s): Naveen Bhoria of Plano TX (US) for texas instruments incorporated, Duc Bui of Grand Prairie TX (US) for texas instruments incorporated, Dheera Balasubramanian Samudrala of Richardson TX (US) for texas instruments incorporated
IPC Code(s): G06F9/30, G06F3/06, G06F9/355, G06F9/38, G06F9/445, G06F12/02, G06F12/0811, G06F16/31, G06F16/41, G06F16/901, G11C11/409
Abstract: a digital data processor includes an instruction memory storing instructions each specifying a data processing operation and at least one data operand field, an instruction decoder coupled to the instruction memory for sequentially recalling instructions from the instruction memory and determining the data processing operation and the at least one data operand, and at least one operational unit coupled to a data register file and to the instruction decoder to perform a data processing operation upon at least one operand corresponding to an instruction decoded by the instruction decoder and storing results of the data processing operation. the at least one operational unit is configured to perform a table write in response to a look up table write instruction by writing at least one data element from a source data register to a specified location in a specified number of at least one table.
Inventor(s): Gregory McKee of Riverton UT (US) for texas instruments incorporated, David Claar of Draper UT (US) for texas instruments incorporated
IPC Code(s): H01J37/32, H01L21/02
Abstract: the present disclosure generally relates to semiconductor processing tool cleaning, such as may be included in semiconductor processing for manufacturing an integrated circuit (ic). in an example, a cleaning process is performed on an interior surface of a chamber of a semiconductor processing tool. the cleaning process includes flowing a reactive gas into an interior volume of the chamber. the interior volume is defined at least in part by the interior surface. the reactive gas consists exclusively of boron trichloride (bcl). after performing the cleaning process, a material layer over a semiconductor substrate is etched in the chamber.
20240178065.LASER DICING TO CONTROL SPLASH_simplified_abstract_(texas instruments incorporated)
Inventor(s): Yang LIU of Chengdu (CN) for texas instruments incorporated, Hao ZHANG of Chengdu (CN) for texas instruments incorporated, Venkataramanan KALYANARAMAN of ALLEN TX (US) for texas instruments incorporated, Lejuan ZHOU of Chengdu (CN) for texas instruments incorporated
IPC Code(s): H01L21/78, B23K26/06, B23K26/53, H01L23/00
Abstract: one example provides a method that includes directing a first laser beam at a surface of a semiconductor substrate along a scribe street thereof. the first laser beam is focused inside the substrate to form a first modified region, which is offset from a second modified region in a direction orthogonal to a scan direction of the first laser beam, and a first crack extending between the second modified region and the first modified region. a second laser beam is directed at the surface to form a third modified region, which is offset from the first and second modified regions, and a second crack extending from the first modified region to the surface. the first and second cracks form a zigzag-shaped crack within the substrate along the scribe street.
20240178085.OPEN CAVITY INTEGRATED CIRCUIT_simplified_abstract_(texas instruments incorporated)
Inventor(s): STEVEN ALFRED KUMMERL of Carrollton TX (US) for texas instruments incorporated, SREENIVASAN K. KODURI of Dallas TX (US) for texas instruments incorporated, SOPHIA DELPAK of Richardson TX (US) for texas instruments incorporated, LAURA MAY ANTIONETTE CLEMENTE of MABALACAT CITY (PH) for texas instruments incorporated
IPC Code(s): H01L23/24, H01L21/56, H01L23/00, H01L23/31
Abstract: an electronic device includes a substrate and a die having an active surface disposed on the substrate. a sensor is in communication with the active surface of the die. a ring encircles the sensor and includes a cylindrical wall and a cap, where the cap has a partial circular shape that extends beyond each side of the wall. a mold compound covers the die and abuts an outer surface of the wall thereby forming a cavity in the mold compound to expose the sensor to an environment external to the electronic device.
20240178104.LEADFRAME BASED POWER MODULE_simplified_abstract_(texas instruments incorporated)
Inventor(s): MAKOTO SHIBUYA of Tokyo (JP) for texas instruments incorporated, DAIKI KOMATSU of Beppu (JP) for texas instruments incorporated, MASAMITSU MATSUURA of Beppu (JP) for texas instruments incorporated
IPC Code(s): H01L23/495, H01L21/56, H01L23/31
Abstract: an electronic device includes a leadframe that includes pins, where the pins have a proximate end and a distal end. a die is attached to the proximate end of the pins of the leadframe and a mold compound encapsulates the die. an electronic component is attached to the leadframe. the distal end of at least two of the pins are substantially perpendicular to the proximate end of the pins in a first direction and the distal end of the remaining pins are substantially perpendicular to the proximate end of the pins in a second direction that is opposite that of the first direction.
Inventor(s): Daniel Harold MATEO of IRVING TX (US) for texas instruments incorporated
IPC Code(s): H01L23/495, H01L21/48, H01L21/56, H01L23/31
Abstract: a lead frame sheet can include a plurality of lead frames and a reinforcement feature. a pair of adjacent lead frames includes an arrangement of opposing leads along adjacent edges thereof, in which the opposing leads are spaced apart from and coupled to each other by an elongated dam bar. the dam bar extends longitudinally along the adjacent edges of the adjacent lead frames. the reinforcement feature extends across the dam bar, in which the leads and the reinforcement feature have a thickness, in a direction orthogonal to a surface of the sheet, which is greater than a thickness of the dam bar.
Inventor(s): Masamitsu Matsuura of Beppu (JP) for texas instruments incorporated
IPC Code(s): H01L23/498, H01L21/48, H01L23/00, H01L23/31
Abstract: in a described example, an apparatus includes: a metal leadframe including a dielectric die support formed in a central portion of the leadframe, and having metal leads extending from the central portion, portions of the metal leads extending into the central portion contacted by the dielectric die support; die attach material over the dielectric die support; a semiconductor die mounted to the dielectric die support by the die attach material, the semiconductor die having bond pads on a device side surface facing away from the dielectric die support; electrical connections extending from the bond pads to metal leads of the leadframe; and mold compound covering the semiconductor die, the electrical connections, the dielectric die support, and portions of the metal leads, the mold compound forming a package body.
Inventor(s): Yiqi Tang of Allen TX (US) for texas instruments incorporated, Rajen Manicon Murugan of Dallas TX (US) for texas instruments incorporated, Chittranjan Mohan Gupta of Richardson TX (US) for texas instruments incorporated, Jie Chen of Plano TX (US) for texas instruments incorporated, Jaimal Mallory Williamson of McKinney TX (US) for texas instruments incorporated
IPC Code(s): H01L23/552, H01L21/48, H01L21/56, H01L23/498
Abstract: an electronic device includes a multilevel package substrate, a semiconductor die, and a molded package structure, where the multilevel package substrate has opposite first and second substrate sides, first and second conductive pads spaced apart from one another along the first substrate side, and a conductive substrate terminal that is exposed along the second substrate side and is electrically coupled to the second conductive pad. the semiconductor die is attached to the first substrate side and has opposite first and second die sides, and a die terminal along the first die side, the die terminal electrically coupled to the first conductive pad. the molded has a package side, a metal shield along the package side, and a conductive package via that extends through the molded package structure and electrically couples the metal shield to the second conductive pad.
Inventor(s): Yiqi Tang of Allen TX (US) for texas instruments incorporated, Chittranjan Mohan Gupta of Richardson TX (US) for texas instruments incorporated, Rajen Manicon Murugan of Dallas TX (US) for texas instruments incorporated, Jie Chen of Plano TX (US) for texas instruments incorporated
IPC Code(s): H01L23/552, H01L21/48, H01L23/00, H01L23/498
Abstract: an electronic device includes a multilevel package substrate having a first level, a second level, a third level, a conductive signal trace that extends in the second level, and a conductive box shield that surrounds a portion of the conductive signal trace. the electronic device includes a semiconductor die attached to the multilevel package substrate and having a conductive structure coupled to an end of the conductive signal trace. the electronic device includes a package structure that encloses the semiconductor die and a portion of the multilevel package substrate.
20240178163.Slot Bow-Tie Antenna On Package_simplified_abstract_(texas instruments incorporated)
Inventor(s): Yiqi Tang of Allen TX (US) for texas instruments incorporated, Rajen M. Murugan of Dallas TX (US) for texas instruments incorporated, Aditya Nitin Jogalekar of Dallas TX (US) for texas instruments incorporated
IPC Code(s): H01L23/66, H01L23/00, H01L23/06, H01L23/31, H01Q5/25, H01Q9/28, H01Q13/10
Abstract: an example semiconductor package comprises a semiconductor die having a top surface, a passivation layer over the top surface, a first metal layer on the first passivation layer, an antenna formed in the first metal layer and offset from the semiconductor die, the antenna having a slot bow-tie configuration, a transmission line formed in the first metal layer, the transmission line coupling the semiconductor die to the antenna, and an insulating material separating the first metal layer from a second metal layer, the second metal layer configured to function as a ground reflector for the antenna. the second metal layer may extend below the antenna and the semiconductor die.
Inventor(s): Masamitsu Matsuura of Oita (JP) for texas instruments incorporated, Kengo Aoya of Oita (JP) for texas instruments incorporated, Daiki Komatsu of Oita (JP) for texas instruments incorporated, Ko Shibata of Oita (JP) for texas instruments incorporated
IPC Code(s): H01L23/00, H01L21/768, H01L23/48
Abstract: an electronic device includes a semiconductor substrate having a first conductive routing structure on a first side of the semiconductor substrate, and a low aspect ratio via opening extending from the first side to an opposite second side. the electronic device includes a transparent cover over a portion of the first side and covering the patterned first conductive routing structure, as well as an insulator layer including a photo-imageable material on the second side and along a sidewall of the via opening, and a second conductive routing structure on an outer side of the insulator layer and extending through the via opening and directly contacting a portion of the first conductive routing structure.
Inventor(s): Rafael Jose Lizares GUEVARA of Angeles (PH) for texas instruments incorporated, Jose Arvin M. PLOMANTES of Dagupan (PH) for texas instruments incorporated
IPC Code(s): H01L23/00
Abstract: in some examples, a method for manufacturing a semiconductor package comprises forming a copper member on a surface; applying a photoresist to the copper member and the surface; and forming a cavity in the photoresist above the copper member. the cavity has a first volume with a first diameter and a second volume with a second diameter larger than the first diameter. the second volume is more proximal to the copper member than the first volume. the method also includes forming a nickel member in the second volume forming a palladium member in the first volume.
20240178184.PROXIMITY SENSOR_simplified_abstract_(texas instruments incorporated)
Inventor(s): Sreenivasan Kalyani KODURI of DALLAS TX (US) for texas instruments incorporated, Leslie Edward STARK of Heath TX (US) for texas instruments incorporated
IPC Code(s): H01L25/04, G01S17/08, H01L25/075, H01L33/62
Abstract: a packaged integrated circuit (ic), comprising: a lead frame; one or more semiconductor dies on the lead frame, the one or more semiconductor dies including a first circuit and a second circuit; and a molding compound encapsulating the lead frame and the semiconductor die, the molding compound including a first cavity over the first circuit and a second cavity over the second circuit, in which at least one of the first or second cavities includes a second material different from the molding compound.
Inventor(s): Jingjing Chen of Santa Clara CA (US) for texas instruments incorporated
IPC Code(s): H01L29/40, H01L29/06, H01L29/10, H01L29/66, H01L29/78
Abstract: an ldmos device includes a semiconductor substrate with an epitaxial layer that comprises a body region and a drain drift region. a drain region is formed in the drain drift region and a source region is formed in the body region. a gate shield may be formed over a gate shield dielectric layer disposed over a gate electrode, the gate shield having a variable length and tied to the source that is provided with a body connection via a deep trench contact.
Inventor(s): Martin B. Mollat of Gainesville TX (US) for texas instruments incorporated, Henry L. Edwards of Garland TX (US) for texas instruments incorporated, Alexei Sadovnikov of Sunnyvale CA (US) for texas instruments incorporated
IPC Code(s): H01L29/78, H01L21/8238, H01L29/66
Abstract: an integrated circuit includes a source region and a drain region spaced apart and extending into a semiconductor layer. a gate electrode extends between the source and the drain regions, and a dielectric layer is between the gate electrode and the semiconductor layer. the dielectric layer includes a first portion having a first thickness and a second portion having a second greater second thickness and a lateral perimeter surrounding the source region. the lateral perimeter includes a first edge having a first linear segment extending between the source region and the drain region along a first direction and a second edge having a second linear segment extending over the semiconductor layer along a different second direction. a fillet of the second portion connects the first linear segment and the second linear segment of the lateral perimeter.
Inventor(s): Masamitsu MATSUURA of Beppu-Shi (JP) for texas instruments incorporated
IPC Code(s): H01L31/0203, H01L31/02, H01L31/18
Abstract: in examples, a semiconductor package comprises a semiconductor die including an ambient light sensor, the ambient light sensor facing a horizontal direction. the package includes first and second conductive terminals wirebonded to the semiconductor die, each of the first and second conductive terminals having first and second segments. the package includes a clear mold compound covering the semiconductor die and portions of the first and second conductive terminals. the first segments of the first and second conductive terminals extend vertically through the clear mold compound to an exterior of the clear mold compound, and wherein the second segments of the first and second conductive terminals are positioned exterior to the clear mold compound, extend horizontally in opposing directions, and are adapted to be coupled to a printed circuit board.
20240178756.DUAL LOOP VOLTAGE CLAMP_simplified_abstract_(texas instruments incorporated)
Inventor(s): Mustapha EL-MARKHI of Richardson TX (US) for texas instruments incorporated, Avadhut JUNNARKAR of McKinney TX (US) for texas instruments incorporated, Sigfredo GONZALEZ DIAZ of Allen TX (US) for texas instruments incorporated
IPC Code(s): H02M3/158, H02M1/08
Abstract: a dual loop clamp circuit includes a clamp circuit and a low-side driver circuit. the clamp circuit includes a clamp enable output and a low-side clamp output. the low-side driver circuit includes a low-side control signal input and an output stage. the output stage includes a low-side drive output and an input. the low-side drive output is coupled to the low-side clamp output. the input of the output stage is coupled to the clamp enable output and the low-side control signal input.
Inventor(s): ANIMESH PAUL of BANGALORE (IN) for texas instruments incorporated
IPC Code(s): H03B5/36
Abstract: an oscillator apparatus, including a first node adapted to be coupled to a first terminal of a crystal oscillator; a second node adapted to be coupled to a second terminal of the crystal oscillator; a transconductance circuit; a first switch coupled between the first node and the second node; and a second switch coupled between the transconductance circuit and the second node.
Inventor(s): Tyler James Archer of Vail AZ (US) for texas instruments incorporated, Bharath Karthik Vasan of Tucson AZ (US) for texas instruments incorporated
IPC Code(s): H03F3/04
Abstract: examples of circuits, amplifiers and stages thereof include a front-end including an input section having a voltage input and a current output; a current generating section operably coupled to the input section and which produces one or more bias currents to generate a tail current that biases the input section. a signal node, which may be the output terminal of the stage, is operably coupled to the input section. transconductance choke circuitry is coupled to the signal node and to the current generating section. the transconductance choke circuitry is configured to reduce transconductance of the front-end when the signal at the signal node exceeds an upper threshold or drops below a lower threshold.
Inventor(s): Ankit Khanna of Tucson AZ (US) for texas instruments incorporated, Dimitar Trifonov of Vail AZ (US) for texas instruments incorporated, Partha S. Basu of Oro Valley AZ (US) for texas instruments incorporated, Chase Puglisi of Tucson AZ (US) for texas instruments incorporated
IPC Code(s): H03F3/45, H03F1/08
Abstract: an example apparatus includes: a transconductance stage including: a fully differential amplifier configured to generate a differential current based on a voltage input; and a transistor configured to be controlled by an output of the fully differential amplifier and source current from an input of the fully differential amplifier; and a transimpedance stage coupled to the transconductance stage, the transimpedance stage including: resistor circuitry configured to convert the differential current into a differential voltage using a first resistance, a second resistance, and a third resistance; and a differential amplifier configured to convert the differential voltage to a single-ended voltage, which represents the voltage input.
Inventor(s): Hesam ASLAN of San Jose CA (US) for texas instruments incorporated, Ramsin ZIAZADEH of San Jose CA (US) for texas instruments incorporated
IPC Code(s): H03K3/012, H03F3/45, H03H11/04, H03K17/687
Abstract: an integrated circuit (ic) includes a voltage-to-current converter circuit having a first voltage terminal, a second voltage terminal, a first current terminal, and a second current terminal. a transimpedance amplifier (tia) and biquad filter circuit has a first tia and biquad filter input coupled to the first current terminal and has a second tia and biquad filter input coupled to the second current terminal. the transimpedance amplifier includes cross-coupled transistors configured to use positive feedback.
Inventor(s): Taisuke KAZAMA of Plano TX (US) for texas instruments incorporated, Mustapha EL-MARKHI of Richardson TX (US) for texas instruments incorporated, Avadhut JUNNARKAR of McKinney TX (US) for texas instruments incorporated
IPC Code(s): H03K5/08, H01L29/866, H02M3/155, H03K17/687
Abstract: an adaptive clamp circuit includes a clamp circuit and a clamp control circuit. the clamp circuit includes a first transistor, a second transistor, and a variable resistor. the first transistor includes a first current terminal, a second current terminal, and a control terminal. the first current terminal is coupled to a switching terminal. the second current terminal is coupled to a ground terminal. the second transistor includes a first current terminal, a second current terminal, and a control terminal. the first current terminal of the second transistor is coupled to the control terminal of the first transistor. the second current terminal of the second transistor is coupled to the switching terminal. the variable resistor is coupled between the control terminal of the second transistor and the ground terminal. the clamp control circuit is coupled between the switching terminal and the variable resistor.
Inventor(s): Mark A. Wolfe of Plano TX (US) for texas instruments incorporated, Harsh D. Jhaveri of Wylie TX (US) for texas instruments incorporated
IPC Code(s): H03K5/14, H03K5/1252, H03K19/003
Abstract: a circuit including a device including a receiver having a receiver input, a receiver output, and a bias current input and a bias generator having a bias current output coupled to the bias current input. the device also includes a buffer having a buffer input, an enable input, and a buffer output, the buffer input coupled to the receiver output and a delay circuit having a delay output coupled to the enable input.
Inventor(s): Venkateswar Reddy Kowkutla of Allen TX (US) for texas instruments incorporated, Chunhua Hu of Plano TX (US) for texas instruments incorporated, Erkan Bilhan of Dallas TX (US) for texas instruments incorporated, Sumant Dinkar Kale of Allen TX (US) for texas instruments incorporated
IPC Code(s): H03K17/22, G05B19/042, G06F1/24, G06F1/3296, H03K17/30
Abstract: systems and methods are provided for voltage monitoring and reset sequencing. one such system includes a voltage detector including multiple voltage level detectors to output multiple power ok signals, respectively; a trim adjustment circuit to output multiple trim values to the multiple voltage level detectors, respectively; and a sequencer circuit coupled to the trim adjustment circuit and the voltage detector. in response to receiving the power ok signals from the multiple voltage level detectors, the sequencer circuit controls output of a reset signal to a target voltage domain.
20240178838.AUDIO INTERFACE PHYSICAL LAYER_simplified_abstract_(texas instruments incorporated)
Inventor(s): Atul Kumar AGRAWAL of Bangalore (IN) for texas instruments incorporated, Abhijit Patki of Bangalore (IN) for texas instruments incorporated, Shaik BASHA of Bangalore (IN) for texas instruments incorporated
IPC Code(s): H03K19/00, G06F3/16, H03K5/01, H03K19/21, H04R3/00, H04R3/12
Abstract: an integrated circuit (ic) includes a tristatable output buffer having a control input. the ic includes an input buffer having a buffer output. the ic further includes a delay circuit having a delay circuit input, a first delay circuit output, and a second delay circuit output. the delay circuit input is coupled to the buffer output. the ic also includes a tristate circuit coupled to the first delay circuit output and to the second delay circuit output. the tristate circuit having a tristate circuit output coupled to the control input.
Inventor(s): Ankit Garg of Bangalore (IN) for texas instruments incorporated, Abhijit Patki of Bangalore (IN) for texas instruments incorporated
IPC Code(s): H03L7/08, H03L7/083, H03L7/091, H03L7/10, H03L7/18
Abstract: a device includes a phase-locked loop (pll) having a reference input. the device has a storage element and a reference clock generator having an interface clock input, a reference clock output, and a programmable clock divider. the reference clock generator is coupled to the storage element. the reference clock output is coupled to the reference input. the reference clock generator is configured to change a divide ratio for the programmable clock divider based on a value in the storage element such that a frequency of the reference clock output remains unchanged when a frequency of the interface clock input changes.
20240178877.MULTI-TERMINAL SWITCH_simplified_abstract_(texas instruments incorporated)
Inventor(s): Tolga Dinc of Dallas TX (US) for texas instruments incorporated, Sachin Kalia of Dallas TX (US) for texas instruments incorporated, Swaminathan Sankaran of Allen TX (US) for texas instruments incorporated
IPC Code(s): H04B1/44, H03K17/687
Abstract: in described examples, a multi-terminal switch includes first and second switches, and first, second, and third inductors. the first switch and first inductor are coupled between first terminals, the second switch and second inductor are coupled between second terminals, and the third inductor is coupled between third terminals. in a first mode, the first switch is opened and the second switch is closed. opening the first switch and closing the second switch enables a first connection between the first terminals and the third terminals via a first magnetic coupling between the first and third inductors. in a second mode, the first switch is closed and the second switch is opened. closing the first switch and opening the second switch enables a second connection between the second terminals and the third terminals via a second magnetic coupling between the second and third inductors.
Inventor(s): Aravind LAKSHMINARAYANAN of Frisco TX (US) for texas instruments incorporated
IPC Code(s): H04N9/31, G03B21/00, G09G3/20
Abstract: a system includes: a spatial light modulator including pixel elements; and a controller coupled to the spatial light modulator. the spatial light modulator sets the pixel elements based on a modulation control signal. the controller is configured to: obtain an image; analyze the image to determine image attributes including a dynamic range metric; provide a control sequence responsive to the determined image attributes; and provide the modulation control signal to the spatial light modulator based on the control sequence. the modulation control signal reduces a number of bits used by the pixel elements relative to a default number of bits if the dynamic range metric is below a dynamic range threshold.
Inventor(s): Ariton E. XHAFA of Plano TX (US) for texas instruments incorporated, Ram MACHNESS of Plano TX (US) for texas instruments incorporated, Minghua FU of Plano TX (US) for texas instruments incorporated, Ramanuja VEDANTHAM of Allen TX (US) for texas instruments incorporated
IPC Code(s): H04W12/104, H04L1/00, H04L9/06, H04W4/80, H04W12/033, H04W12/106, H04W12/108, H04W12/12, H04W64/00, H04W80/02
Abstract: at least some aspects of the present disclosure provide for a method of data transmission, performed by a wireless device. in some examples, the method includes receiving a localization tone having a first value. the method further includes inserting the localization tone into a data packet at an application layer of a communication protocol stack, the localization tone preceding data of a payload of the data packet and having a last bit immediately preceding a first bit of the data of the payload. the method further includes generating a modified localization tone estimating an effect of processing on the localization tone, wherein the modified localization tone is generated and configured to have the first value after undergoing processing. the method further includes replacing the localization tone in the data packet with the modified localization tone. the method further includes transmitting the data packet.
Inventor(s): Yoav Ben-Yehezkel of NETANYA (IL) for texas instruments incorporated, Yaron Alpert of HOD-HASHARON (IL) for texas instruments incorporated
IPC Code(s): H04W84/12, H04W88/06
Abstract: an example apparatus includes: wireless local area network (wlan) interface circuitry configured to communicate using a resource; alternate interface circuitry configured to use the resource; and coexistence controller circuitry coupled to the wlan interface circuitry and the alternate interface circuitry, the coexistence controller circuitry including: a first interface monitor coupled to the wlan interface circuitry, the first interface monitor configured to determine characteristics of a target wakeup time (twt) service of the wlan interface circuitry; a second interface monitor coupled to the alternate interface circuitry, the second interface monitor configured to determine characteristics of an alternate activity period window of the alternative interface circuitry; a coexistence comparator coupled to the first interface monitor and the second interface monitor, the coexistence comparator configured to determine a predicted twt service period of the twt service that overlaps with a predicted alternate activity period window less than a threshold.
TEXAS INSTRUMENTS INCORPORATED patent applications on May 30th, 2024
- TEXAS INSTRUMENTS INCORPORATED
- G01R31/28
- G01R27/02
- Texas instruments incorporated
- G01S7/03
- G01S7/35
- G01S13/931
- G01S7/288
- G01S13/34
- G01S13/44
- G01S13/58
- H04B7/212
- G06F3/06
- G06F9/30
- G06F9/355
- G06F9/38
- G06F9/445
- G06F12/02
- G06F12/0811
- G06F16/31
- G06F16/41
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