18419159. SHARING MEMORY AND I/O SERVICES BETWEEN NODES simplified abstract (Intel Corporation)

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SHARING MEMORY AND I/O SERVICES BETWEEN NODES

Organization Name

Intel Corporation

Inventor(s)

Debendra Das Sharma of Saratoga CA (US)

Robert G. Blankenship of Tacoma WA (US)

Suresh S. Chittor of Portland OR (US)

Kenneth C. Creta of Gig Harbor WA (US)

Balint Fleischer of Groton MA (US)

Michelle C. Jen of Mountain View CA (US)

Mohan J. Kumar of Aloha OR (US)

Brian S. Morris of Santa Clara CA (US)

SHARING MEMORY AND I/O SERVICES BETWEEN NODES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18419159 titled 'SHARING MEMORY AND I/O SERVICES BETWEEN NODES

Simplified Explanation

The abstract of the patent application describes a first die with a port to connect to a second die over a die-to-die interconnect. The port includes circuitry to identify different protocols and send data between the dies using these protocols.

  • The patent application involves a first die with a port for connecting to a second die over a die-to-die interconnect.
  • The port includes circuitry to identify different protocols in a plurality of protocols and send data using these protocols between the dies.
  • The first die sends first protocol identification data to identify a first protocol, then sends first data of that protocol to the second die.
  • The first die also sends second protocol identification data to identify a different second protocol, then sends second data of that protocol to the second die.

Potential Applications

This technology could be applied in high-speed data transfer between integrated circuits, such as in data centers or high-performance computing systems.

Problems Solved

This technology solves the problem of efficiently transferring data between different integrated circuits using various protocols without the need for separate connections for each protocol.

Benefits

The benefits of this technology include improved data transfer speeds, reduced complexity in interconnect design, and increased flexibility in supporting multiple protocols.

Potential Commercial Applications

  • "High-Speed Data Transfer Technology for Integrated Circuits"

Possible Prior Art

One possible prior art for this technology could be the use of multi-protocol interconnects in networking equipment to support different communication standards.

Unanswered Questions

How does this technology impact power consumption in integrated circuits?

The abstract does not mention anything about the power consumption implications of implementing this technology. It would be interesting to know if this innovation has any effects on the power efficiency of the integrated circuits.

Are there any limitations to the number of protocols that can be supported by this technology?

The abstract does not specify if there is a limit to the number of protocols that can be identified and used for data transfer between the dies. Understanding any potential limitations in this aspect would provide a clearer picture of the technology's scalability and flexibility.


Original Abstract Submitted

A first die has a port to couple the first die to a second die over a die-to-die interconnect. The port includes circuitry to implement a physical layer of the die-to-die interconnect, send first protocol identification data over the physical layer to identify a first protocol in a plurality of protocols, send first data over the interconnect to the second die, wherein the first data comprise data of the first protocol, send second protocol identification data over the physical layer to identify a different second protocol in the plurality of protocols, and send second data over the interconnect to the second die, wherein the second data comprise flits of the second protocol.