18420881. DUAL-GATE ARRAY SUBSTRATE AND DISPLAY DEVICE simplified abstract (BOE TECHNOLOGY GROUP CO., LTD.)

DUAL-GATE ARRAY SUBSTRATE AND DISPLAY DEVICE

Organization Name

BOE TECHNOLOGY GROUP CO., LTD.

Inventor(s)

Pengcheng Zang of Beijing (CN)

Weiyun Huang of Beijing (CN)

Xiaojing Qi of Beijing (CN)

Tingliang Liu of Beijing (CN)

DUAL-GATE ARRAY SUBSTRATE AND DISPLAY DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18420881 titled 'DUAL-GATE ARRAY SUBSTRATE AND DISPLAY DEVICE

Simplified Explanation

The abstract describes a dual-gate array substrate with gate lines, primary and secondary signal lines, pixel units, and common electrodes.

• The dual-gate array substrate includes gate lines extended in one direction and primary/secondary signal lines extended in the perpendicular direction.
• Primary signal lines are connected to a drive unit and to adjacent pixel units.
• Common electrodes include main electrodes and branching electrodes, with the main electrodes covering the primary signal lines.
• Each gate line includes a protrusion protruding in the first direction.

Potential Applications

The technology described in this patent application could be used in the manufacturing of advanced display panels, touchscreens, and other electronic devices requiring precise control of pixel units.

Problems Solved

This technology solves the problem of signal interference and crosstalk in dual-gate array substrates, ensuring efficient and accurate operation of pixel units in electronic devices.

Benefits

The benefits of this technology include improved display quality, reduced signal interference, enhanced pixel control, and overall better performance of electronic devices utilizing dual-gate array substrates.

Potential Commercial Applications

• "Advanced Dual-Gate Array Substrate Technology for High-Resolution Displays"

Possible Prior Art

There may be prior art related to dual-gate array substrates in the field of display technology, but specific examples are not provided in this patent application.

How does this technology compare to existing dual-gate array substrates in terms of performance and efficiency?

This article does not provide a direct comparison with existing technologies, so it is unclear how this innovation stands out in the market.

What are the potential challenges in implementing this technology on a large scale for commercial production?

The article does not address the potential challenges or limitations that may arise when scaling up production of dual-gate array substrates using this technology.

Original Abstract Submitted

A dual-gate array substrate includes: a plurality of gate lines arranged in a first direction and each extended in a second direction that is perpendicular to the first direction; a plurality of primary signal lines and secondary signal lines arranged alternately in the second direction and extended in the first direction; and a plurality of pixel units. The primary signal lines are connected to a drive unit, and connected respectively to the pixel units that are adjacent thereto. Common electrodes include a plurality of main electrodes and a plurality of branching electrodes. An orthographic projection of the main electrode on the dual-gate array substrate does not overlap with those of corresponding ones, adjacent to the main electrode, of the pixel electrodes and at least covers the primary signal line. Each gate line includes a protrusion protruded in the first