International business machines corporation (20240160348). ACCURATE PROGRAMMING OF ANALOG MEMORY DEVICES OF IN-MEMORY PROCESSING DEVICES HAVING A CROSSBAR ARRAY STRUCTURE simplified abstract

ACCURATE PROGRAMMING OF ANALOG MEMORY DEVICES OF IN-MEMORY PROCESSING DEVICES HAVING A CROSSBAR ARRAY STRUCTURE

Organization Name

international business machines corporation

Inventor(s)

Manuel Le Gallo-bourdeau of Horgen (CH)

Athanasios Vasilopoulos of Zurich (CH)

Benedikt Kersting of Zurich (CH)

[[:Category:Julian Röttger B�chel of Zurich (CH)|Julian Röttger B�chel of Zurich (CH)]][[Category:Julian Röttger B�chel of Zurich (CH)]]

Abu Sebastian of Adliswil (CH)

ACCURATE PROGRAMMING OF ANALOG MEMORY DEVICES OF IN-MEMORY PROCESSING DEVICES HAVING A CROSSBAR ARRAY STRUCTURE - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240160348 titled 'ACCURATE PROGRAMMING OF ANALOG MEMORY DEVICES OF IN-MEMORY PROCESSING DEVICES HAVING A CROSSBAR ARRAY STRUCTURE

Simplified Explanation

The invention described in the abstract is a method of programming memory elements of an in-memory computing (IMC) device. The IMC applies a set signal to a group of memory elements in each cell, sets them to a set state, reads conductance values of the memory elements, and adjusts the conductance values to match a target conductance value. The goal is to maximize the number of memory elements in either a set state or a reset state, with at most one memory element in neither state.

• Method of programming memory elements in an in-memory computing device
• Applying a set signal to memory elements in each cell to set them to a set state
• Reading conductance values of the memory elements in the set state
• Adjusting the conductance values to match a target conductance value
• Maximizing the number of memory elements in set or reset states

Potential Applications

This technology could be applied in various fields such as artificial intelligence, data storage, and computing systems.

Problems Solved

This method solves the problem of efficiently programming memory elements in an in-memory computing device to match a target conductance value.

Benefits

The benefits of this technology include improved efficiency in programming memory elements, optimized conductance values, and enhanced performance of in-memory computing devices.

Potential Commercial Applications

Potential commercial applications of this technology could include advanced data storage systems, high-performance computing devices, and AI applications.

Possible Prior Art

One possible prior art could be the method of programming memory elements in traditional computing systems using different techniques for setting and adjusting conductance values.

How does this method compare to existing techniques for programming memory elements in in-memory computing devices?

This article does not provide a direct comparison to existing techniques for programming memory elements in IMC devices. It would be helpful to understand the advantages and limitations of this method compared to other approaches.

What are the specific parameters and requirements for implementing this method in practical applications?

The article does not detail the specific parameters or requirements for implementing this method in real-world applications. Understanding the practical considerations and constraints would be essential for successful implementation.

Original Abstract Submitted

the invention is notably directed to a method of programming memory elements of an in-memory computing (imc) device. the imc applies a set signal to the k memory elements of said each cell to set each of the k memory elements to a set state and reading k conductance values of the k memory elements in the set state. the imc adjusts, based on the k conductance values read and the target conductance value, a conductance value of at least one of the k memory elements to match a summed conductance of the k memory elements of said each cell with the target conductance value. the imc maximizes a number of the k memory elements that are either in their set state or in a reset state of zero conductance nominal value, such that at most one of the k memory elements is neither in a set state nor in a reset state.