Samsung electronics co., ltd. (20240162184). SEMICONDUCTOR PACKAGE simplified abstract
Contents
- 1 SEMICONDUCTOR PACKAGE
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Sang-Sick Park of Suwon-si (KR)
Un-Byoung Kang of Suwon-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240162184 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The semiconductor package described in the abstract includes a first structure with a first semiconductor chip, a first conductive pad, a second conductive pad, a bump, a first adhesive layer, and a second adhesive layer. The first adhesive layer surrounds the bump and the first conductive pad, while the second adhesive layer surrounds the bump and the second conductive pad. The horizontal width of the first adhesive layer is smaller than the horizontal width of the second adhesive layer.
- First structure with first semiconductor chip
- First conductive pad and second conductive pad
- Bump connecting the pads
- First adhesive layer surrounding bump and first conductive pad
- Second adhesive layer surrounding bump and second conductive pad
Potential Applications
The technology described in this patent application could be applied in various semiconductor packaging processes, particularly in the assembly of semiconductor chips onto structures with conductive pads.
Problems Solved
This technology addresses the challenge of securely connecting semiconductor chips to structures with conductive pads while ensuring proper alignment and electrical connectivity.
Benefits
The use of different adhesive layers with varying widths helps improve the overall reliability and performance of the semiconductor package. This design can enhance the durability and longevity of electronic devices.
Potential Commercial Applications
This innovative semiconductor packaging technology could be utilized in the manufacturing of consumer electronics, automotive electronics, industrial equipment, and other electronic devices that require reliable and efficient semiconductor packaging solutions.
Possible Prior Art
One possible prior art in semiconductor packaging technology is the use of different adhesive materials and structures to improve the bonding and connectivity between semiconductor chips and conductive pads.
Unanswered Questions
How does this technology compare to existing semiconductor packaging methods?
This article does not provide a direct comparison to existing semiconductor packaging methods, leaving the reader to wonder about the specific advantages and disadvantages of this new approach.
What are the specific materials used in the first and second adhesive layers?
The abstract mentions that the second adhesive layer includes a material different from the first adhesive layer, but it does not specify the exact materials used in each layer.
Original Abstract Submitted
a semiconductor package includes a first structure, a first semiconductor chip on the first structure, a first conductive pad on the first structure between the first structure and the first semiconductor chip, a second conductive pad on a lower surface of the first semiconductor chip and vertically overlapping the first conductive pad, a bump connecting the first conductive pad and the second conductive pad, a first adhesive layer surrounding at least a part of side walls of the bump and side walls of the first conductive pad, and a second adhesive layer surrounding at least a part of the side walls of the bump and side walls of the second conductive pad, the second adhesive layer including a material different from the first adhesive layer, wherein a horizontal width of the first adhesive layer is smaller than a horizontal width of the second adhesive layer.
