Samsung electronics co., ltd. (20240162135). SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE simplified abstract

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SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE

Organization Name

samsung electronics co., ltd.

Inventor(s)

Jingu Kim of Suwon-si (KR)

Yieok Kwon of Suwon-si (KR)

Wooyoung Kim of Suwon-si (KR)

Gongje Lee of Suwon-si (KR)

Sangkyu Lee of Suwon-si (KR)

Bongju Cho of Suwon-si (KR)

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240162135 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE

Simplified Explanation

The semiconductor package described in the abstract includes a lower redistribution wiring layer and a first semiconductor device connected to the lower redistribution wiring layer via conductive bumps. The lower redistribution wiring layer consists of a first redistribution wire, an insulating structure layer with an opening exposing a portion of the first redistribution wire, a second redistribution wire in the opening, and bonding pads connected to the second redistribution wire.

  • Lower redistribution wiring layer with first and second redistribution wires:
 - The lower redistribution wiring layer includes a first redistribution wire in a first lower insulating layer and a second redistribution wire in an insulating structure layer.
  • Insulating structure layer with opening exposing first redistribution wire:
 - The insulating structure layer consists of a first photosensitive insulating layer, a light blocking layer, and a second photosensitive insulating layer, with an opening that exposes a portion of the first redistribution wire.
  • Bonding pads connected to second redistribution wire:
 - The bonding pads are bonded to the conductive bumps and electrically connected to the second redistribution wire.

Potential Applications

This technology can be applied in: - Semiconductor packaging - Integrated circuits - Electronics manufacturing

Problems Solved

- Improved connectivity in semiconductor devices - Enhanced performance and reliability of electronic components

Benefits

- Higher efficiency in data transmission - Increased durability and longevity of semiconductor packages - Enhanced overall performance of electronic devices

Potential Commercial Applications

Optimizing Semiconductor Package Wiring for Improved Performance

Possible Prior Art

Prior art related to semiconductor packaging and wiring technologies may exist, but specific examples are not provided in the abstract.

Unanswered Questions

How does this technology compare to existing semiconductor packaging solutions in terms of cost-effectiveness?

The abstract does not mention cost implications or comparisons with other semiconductor packaging solutions.

What are the environmental impacts of implementing this technology in electronic devices?

The abstract does not address the environmental considerations or sustainability aspects of using this semiconductor packaging technology.


Original Abstract Submitted

a semiconductor package includes a lower redistribution wiring layer; and a first semiconductor device on the lower redistribution wiring layer, the first semiconductor device being connected to the lower redistribution wiring layer via conductive bumps, wherein the lower redistribution wiring layer includes: a first redistribution wire in a first lower insulating layer; an insulating structure layer having an opening that exposes a portion of the first redistribution wire, the insulating structure layer including a first photosensitive insulating layer, a light blocking layer on the first photosensitive insulating layer, and a second photosensitive insulating layer on the light blocking layer; a second redistribution wire in the opening of the insulating structure layer, the second redistribution wire including a redistribution via contacting the first redistribution wire, and a redistribution line stacked on the redistribution via; and bonding pads bonded to the conductive bumps and electrically connected to the second redistribution wire.