Apple inc. (20240161804). Memory System Having Combined High Density, Low Bandwidth and Low Density, High Bandwidth Memories simplified abstract

Memory System Having Combined High Density, Low Bandwidth and Low Density, High Bandwidth Memories

Organization Name

apple inc.

Inventor(s)

Sukalpa Biswas of Fremont CA (US)

Farid Nemati of Redwood City CA (US)

Memory System Having Combined High Density, Low Bandwidth and Low Density, High Bandwidth Memories - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240161804 titled 'Memory System Having Combined High Density, Low Bandwidth and Low Density, High Bandwidth Memories

Simplified Explanation

The abstract describes a memory system with at least two types of DRAM, each with different characteristics such as density, latency, and bandwidth. The DRAM types are located on separate integrated circuits, which can be stacked together. The second integrated circuit includes a physical layer circuit shared by the DRAM in the first integrated circuits.

• The memory system includes at least two types of DRAM with different characteristics.
• One DRAM type is high density, while the other has lower density but lower latency and higher bandwidth.
• The DRAM types are on separate integrated circuits, which can be stacked together.
• The second integrated circuit includes a physical layer circuit shared by the DRAM in the first integrated circuits.

Potential Applications

The technology described in the patent application could be applied in:

• High-performance computing systems
• Data centers
• Artificial intelligence and machine learning applications

Problems Solved

This technology helps address the following issues:

• Balancing between high density and low latency/high bandwidth memory requirements
• Improving overall system performance by utilizing different types of DRAM

Benefits

The benefits of this technology include:

• Enhanced memory system performance
• Efficient utilization of different types of DRAM
• Increased flexibility in designing memory systems

Potential Commercial Applications

The technology has potential commercial applications in:

• Server and data center hardware
• High-end consumer electronics
• Networking equipment

Possible Prior Art

One possible prior art could be the use of stacked memory modules with different characteristics to optimize system performance.

What are the manufacturing implications of integrating different types of DRAM on separate integrated circuits?

Integrating different types of DRAM on separate integrated circuits may require additional testing and validation processes to ensure compatibility and performance. Manufacturers would need to develop specialized packaging and interconnect technologies to enable efficient communication between the different DRAM types.

How does the shared physical layer circuit in the second integrated circuit contribute to overall system efficiency?

The shared physical layer circuit in the second integrated circuit helps streamline communication and data transfer between the different DRAM types and other circuitry, such as memory controllers. By sharing this circuit, the system can achieve higher efficiency and performance without duplicating resources unnecessarily.

Original Abstract Submitted

in an embodiment, a memory system may include at least two types of dram, which differ in at least one characteristic. for example, one dram type may be a high density dram, while another dram type may have lower density but may also have lower latency and higher bandwidth than the first dram type. dram of the first type may be on one or more first integrated circuits and dram of the second type may be on one or more second integrated circuits. in an embodiment, the first and second integrated circuits may be coupled together in a stack. the second integrated circuit may include a physical layer circuit to couple to other circuitry (e.g., an integrated circuit having a memory controller, such as a system on a chip (soc)), and the physical layer circuit may be shared by the dram in the first integrated circuits.