Intel corporation (20250124266). DEEP NEURAL NETWORK ARCHITECTURE USING PIECEWISE LINEAR APPROXIMATION
DEEP NEURAL NETWORK ARCHITECTURE USING PIECEWISE LINEAR APPROXIMATION
Organization Name
Inventor(s)
Kamlesh Pillai of Bangalore IN
Gurpreet S. Kalsi of Bangalore IN
DEEP NEURAL NETWORK ARCHITECTURE USING PIECEWISE LINEAR APPROXIMATION
This abstract first appeared for US patent application 20250124266 titled 'DEEP NEURAL NETWORK ARCHITECTURE USING PIECEWISE LINEAR APPROXIMATION
Original Abstract Submitted
in one embodiment, an apparatus comprises a log circuit to: identify an input associated with a logarithm operation, wherein the logarithm operation is to be performed by the log circuit using piecewise linear approximation; identify a first range that the input falls within, wherein the first range is identified from a plurality of ranges associated with a plurality of piecewise linear approximation (pla) equations for the logarithm operation, and wherein the first range corresponds to a first equation of the plurality of pla equations; compute a result of the first equation based on a plurality of operands associated with the first equation; and return an output associated with the logarithm operation, wherein the output is generated based at least in part on the result of the first equation.
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