Intel corporation (20250120152). GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING OXIDE SUB-FINS
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING OXIDE SUB-FINS
Organization Name
Inventor(s)
Leonard P. Guler of Hillsboro OR US
Biswajeet Guha of Hillsboro OR US
Swaminathan Sivakumar of Beaverton OR US
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING OXIDE SUB-FINS
This abstract first appeared for US patent application 20250120152 titled 'GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING OXIDE SUB-FINS
Original Abstract Submitted
gate-all-around integrated circuit structures having oxide sub-fins, and methods of fabricating gate-all-around integrated circuit structures having oxide sub-fins, are described. for example, an integrated circuit structure includes an oxide sub-fin structure having a top and sidewalls. an oxidation catalyst layer is on the top and sidewalls of the oxide sub-fin structure. a vertical arrangement of nanowires is above the oxide sub-fin structure. a gate stack is surrounding the vertical arrangement of nanowires and on at least the portion of the oxidation catalyst layer on the top of the oxide sub-fin structure.
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