18339504. BROADCASTING POWER LIMITING MANAGEMENT RESPONSES IN A PROCESSOR-BASED SYSTEM IN AN INTEGRATED CIRCUIT (IC) CHIP (QUALCOMM Incorporated)
Contents
BROADCASTING POWER LIMITING MANAGEMENT RESPONSES IN A PROCESSOR-BASED SYSTEM IN AN INTEGRATED CIRCUIT (IC) CHIP
Organization Name
Inventor(s)
Sagar Koorapati of Austin TX (US)
Vinod Chamarty of Campbell CA (US)
Alon Naveh of Corte Madera CA (US)
BROADCASTING POWER LIMITING MANAGEMENT RESPONSES IN A PROCESSOR-BASED SYSTEM IN AN INTEGRATED CIRCUIT (IC) CHIP
This abstract first appeared for US patent application 18339504 titled 'BROADCASTING POWER LIMITING MANAGEMENT RESPONSES IN A PROCESSOR-BASED SYSTEM IN AN INTEGRATED CIRCUIT (IC) CHIP
Original Abstract Submitted
Broadcasting power limiting management responses in a processor-based system in an integrated circuit (IC) chip is disclosed herein. In one aspect, an IC chip comprises a processor-based system that includes a power estimation and limiting (PEL) circuit, a Limit Management Throughput Throttle (LMTT) source circuit, a plurality of activity management (AM) circuits, and an LMTT bus communicatively coupling the LMTT source circuit with each AM circuit of the plurality of AM circuits. The LMTT source circuit receives a power limiting management response from a PEL circuit via a communications network of the processor-based system, and generates an LMTT command based on the power limiting management response. The LMTT source circuit broadcasts the LMTT command to each AM circuit of the plurality of AM circuits via the LMTT bus.
