Samsung electronics co., ltd. (20240404936). STACKED STRUCTURE INCLUDING CONDUCTIVE PATTERN FOR SELF-ALIGNMENT
STACKED STRUCTURE INCLUDING CONDUCTIVE PATTERN FOR SELF-ALIGNMENT
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STACKED STRUCTURE INCLUDING CONDUCTIVE PATTERN FOR SELF-ALIGNMENT
This abstract first appeared for US patent application 20240404936 titled 'STACKED STRUCTURE INCLUDING CONDUCTIVE PATTERN FOR SELF-ALIGNMENT
Original Abstract Submitted
a stacked structure includes a lower substrate and a first semiconductor chip stacked on an upper surface of the lower substrate, the lower substrate includes a lower conductor pattern disposed on the upper surface of the lower substrate, the first semiconductor chip may have first and second surfaces facing each other, the second surface of the first semiconductor chip may face the upper surface of the lower substrate, and the first semiconductor chip may include a first conductor pattern disposed on the second surface. the first conductor pattern may be aligned with the lower conductor pattern in a first direction perpendicular to the upper surface of the lower substrate, and the first conductor pattern may be spaced apart from the lower conductor pattern in the first direction.
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