Taiwan semiconductor manufacturing company, ltd. (20240379832). CMOS FABRICATION METHODS FOR BACK-GATE TRANSISTOR simplified abstract

CMOS FABRICATION METHODS FOR BACK-GATE TRANSISTOR

Organization Name

taiwan semiconductor manufacturing company, ltd.

Inventor(s)

Chun-Chieh Lu of Taipei City (TW)

Tzu Ang Chao of Hsinchu (TW)

Chao-Ching Cheng of Hsinchu (TW)

Lain-Jong Li of Hsinchu (TW)

CMOS FABRICATION METHODS FOR BACK-GATE TRANSISTOR - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240379832 titled 'CMOS FABRICATION METHODS FOR BACK-GATE TRANSISTOR

The patent application describes a device with a unique structure involving various layers and materials to enhance its performance.

• The device includes a semiconductor substrate, a low-k dielectric layer, an isolation layer, and an n-type work function layer.
• A low-dimensional semiconductor layer is present on the top surface and sidewall of the work function layer.
• Source/drain contacts connect to the low-dimensional semiconductor layer, and a dielectric doping layer with aluminum or hafnium is over the channel portion of the semiconductor layer.
• The channel portion of the low-dimensional semiconductor layer also contains the metal from the dielectric doping layer.

Potential Applications: - This technology could be used in advanced semiconductor devices for improved performance and efficiency. - It may find applications in the development of high-speed and low-power electronic devices.

Problems Solved: - Enhances the performance and efficiency of semiconductor devices. - Provides a unique structure for better control and manipulation of electrical properties.

Benefits: - Improved device performance. - Enhanced efficiency and speed of electronic devices. - Better control over electrical properties.

Commercial Applications: Title: Advanced Semiconductor Devices with Enhanced Performance This technology could be utilized in the production of high-performance electronic devices such as smartphones, tablets, and computers, leading to faster and more efficient devices in the market.

Questions about the technology: 1. How does the presence of the low-dimensional semiconductor layer impact the device's performance?

  - The low-dimensional semiconductor layer enhances the device's electrical properties and allows for better control over its performance.

2. What advantages does the dielectric doping layer with aluminum or hafnium offer in the device?

  - The dielectric doping layer helps improve the conductivity and efficiency of the device, leading to enhanced overall performance.

Original Abstract Submitted

a device includes a semiconductor substrate, a low-k dielectric layer over the semiconductor substrate, an isolation layer over the low-k dielectric layer, and a work function layer over the isolation layer. the work function layer is an n-type work function layer. the device further includes a low-dimensional semiconductor layer on a top surface and a sidewall of the work function layer, source/drain contacts contacting opposing end portions of the low-dimensional semiconductor layer, and a dielectric doping layer over and contacting a channel portion of the low-dimensional semiconductor layer. the dielectric doping layer includes a metal selected from aluminum and hafnium, and the channel portion of the low-dimensional semiconductor layer further comprises the metal.