Taiwan semiconductor manufacturing company, ltd. (20240379800). NANO TRANSISTORS WITH SOURCE/DRAIN HAVING SIDE CONTACTS TO 2-D MATERIAL simplified abstract
Contents
NANO TRANSISTORS WITH SOURCE/DRAIN HAVING SIDE CONTACTS TO 2-D MATERIAL
Organization Name
taiwan semiconductor manufacturing company, ltd.
Inventor(s)
Chao-Ching Cheng of Hsinchu (TW)
Hung-Li Chiang of Taipei City (TW)
Tzu-Chiang Chen of Hsinchu (TW)
NANO TRANSISTORS WITH SOURCE/DRAIN HAVING SIDE CONTACTS TO 2-D MATERIAL - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240379800 titled 'NANO TRANSISTORS WITH SOURCE/DRAIN HAVING SIDE CONTACTS TO 2-D MATERIAL
The method described in the abstract involves the formation of a complex structure over a substrate, including sacrificial layers and isolation layers, to create spaces for a gate stack.
- Formation of sacrificial layers and isolation layers over a substrate
- Creation of a sandwich structure with a two-dimensional material
- Formation of source/drain regions on opposing ends of the two-dimensional material
- Removal of sacrificial layers to generate spaces
- Filling the spaces with a gate stack
Potential Applications: - Advanced semiconductor devices - Nanoelectronics - Optoelectronics
Problems Solved: - Enhancing the performance of electronic devices - Improving the efficiency of semiconductor manufacturing processes
Benefits: - Increased device performance - Enhanced manufacturing capabilities - Potential for smaller and more efficient electronic devices
Commercial Applications: Title: Advanced Semiconductor Manufacturing Process This technology could revolutionize the semiconductor industry by enabling the production of more advanced and efficient electronic devices. The market implications include increased demand for cutting-edge semiconductor manufacturing equipment and processes.
Prior Art: Researchers and engineers in the field of semiconductor manufacturing may find relevant prior art in the development of two-dimensional materials and advanced gate stack technologies.
Frequently Updated Research: Ongoing research in the field of nanoelectronics and semiconductor materials could provide valuable insights into the further optimization of this innovative manufacturing process.
Questions about the Technology: 1. How does the use of sacrificial layers contribute to the efficiency of the manufacturing process? 2. What are the potential challenges associated with integrating two-dimensional materials into semiconductor devices?
Original Abstract Submitted
a method includes forming a first sacrificial layer over a substrate, and forming a sandwich structure over the first sacrificial layer. the sandwich structure includes a first isolation layer, a two-dimensional material over the first isolation layer, and a second isolation layer over the two-dimensional material. the method further includes forming a second sacrificial layer over the sandwich structure, forming a first source/drain region and a second source/drain region on opposing ends of, and contacting sidewalls of, the two-dimensional material, removing the first sacrificial layer and the second sacrificial layer to generate spaces, and forming a gate stack filling the spaces.
