Taiwan semiconductor manufacturing company, ltd. (20240379775). PROCESS AND STRUCTURE FOR SOURCE/DRAIN CONTACTS simplified abstract
Contents
PROCESS AND STRUCTURE FOR SOURCE/DRAIN CONTACTS
Organization Name
taiwan semiconductor manufacturing company, ltd.
Inventor(s)
Sheng-Tsung Wang of Hsinchu (TW)
Huan-Chieh Su of Changhua County (TW)
Cheng-Chi Chuang of New Taipei City (TW)
Chih-Hao Wang of Hsinchu County (TW)
PROCESS AND STRUCTURE FOR SOURCE/DRAIN CONTACTS - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240379775 titled 'PROCESS AND STRUCTURE FOR SOURCE/DRAIN CONTACTS
The method described in the abstract involves a process for fabricating a structure with source/drain electrodes and dielectric layers in a semiconductor device.
- Formation of a first etch mask to cover a portion of the first dielectric layer.
- Etching the first dielectric layer to create trenches over the source/drain electrodes.
- Filling the trenches with a different material dielectric layer.
- Removal of the first etch mask.
- Second etching process to create a second trench above one of the electrodes.
- Deposition of a metal layer into at least the second trench.
- Chemical mechanical planarization (CMP) process to the metal layer.
Potential Applications: - Semiconductor manufacturing - Integrated circuit fabrication - Electronic device production
Problems Solved: - Improving the performance and reliability of semiconductor devices - Enhancing the functionality of integrated circuits
Benefits: - Increased efficiency in semiconductor fabrication - Enhanced device performance and durability
Commercial Applications: Title: Advanced Semiconductor Fabrication Method for Enhanced Device Performance This technology can be utilized in the production of high-performance electronic devices, leading to improved market competitiveness and consumer satisfaction.
Questions about the technology: 1. How does the use of different dielectric materials in the trenches benefit the overall device performance? 2. What are the specific advantages of the CMP process in relation to the metal layer deposition?
Original Abstract Submitted
a method includes providing a structure having source/drain electrodes and a first dielectric layer over the source/drain electrodes; forming a first etch mask covering a first area of the first dielectric layer; performing a first etching process to the first dielectric layer, resulting in first trenches over the source/drain electrodes; filling the first trenches with a second dielectric layer that has a different material than the first dielectric layer; removing the first etch mask; performing a second etching process including isotropic etching to the first area of the first dielectric layer, resulting in a second trench above a first one of the source/drain electrodes; depositing a metal layer into at least the second trench; and performing a chemical mechanical planarization (cmp) process to the metal layer.
- Taiwan semiconductor manufacturing company, ltd.
- Meng-Huan Jao of Hsinchu (TW)
- Lin-Yu Huang of Hsinchu (TW)
- Sheng-Tsung Wang of Hsinchu (TW)
- Huan-Chieh Su of Changhua County (TW)
- Cheng-Chi Chuang of New Taipei City (TW)
- Chih-Hao Wang of Hsinchu County (TW)
- H01L29/40
- H01L21/311
- H01L21/321
- H01L29/417
- H01L29/45
- CPC H01L29/401