Taiwan semiconductor manufacturing company, ltd. (20240379751). Semiconductor Device and Method of Manufacture simplified abstract

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Semiconductor Device and Method of Manufacture

Organization Name

taiwan semiconductor manufacturing company, ltd.

Inventor(s)

Yu-Chang Lin of Hsinchu (TW)

Chun-Hung Wu of New Taipei (TW)

Liang-Yin Chen of Hsinchu (TW)

Huicheng Chang of Tainan (TW)

Yee-Chia Yeo of Hsinchu (TW)

Semiconductor Device and Method of Manufacture - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240379751 titled 'Semiconductor Device and Method of Manufacture

The method described in the abstract involves depositing a multi-layer stack on a semiconductor substrate, with sacrificial layers alternating with channel layers. A dummy gate is formed on the stack, followed by the formation of a first spacer on the dummy gate's sidewall. Two implantation processes are then performed to create doped regions in the channel layers, with the second implantation having higher energy and different dose compared to the first implantation.

  • The method involves depositing a multi-layer stack on a semiconductor substrate.
  • The stack consists of sacrificial layers alternating with channel layers.
  • A dummy gate is formed on the multi-layer stack.
  • A first spacer is formed on the sidewall of the dummy gate.
  • Two implantation processes are performed to create doped regions in the channel layers.
  • The second implantation process has higher energy and a different dose compared to the first implantation.

Potential Applications: - Semiconductor manufacturing - Integrated circuit fabrication

Problems Solved: - Enhancing the performance of semiconductor devices - Improving the efficiency of implantation processes

Benefits: - Increased precision in doping regions - Enhanced control over semiconductor device properties

Commercial Applications: Title: Advanced Semiconductor Manufacturing Method This technology can be utilized in the production of high-performance semiconductor devices, leading to improved efficiency and reliability in various electronic applications. The market implications include advancements in the semiconductor industry and potential cost savings for manufacturers.

Questions about the technology: 1. How does this method improve the performance of semiconductor devices? 2. What are the key advantages of using sacrificial layers in the multi-layer stack?


Original Abstract Submitted

a method includes depositing a multi-layer stack on a semiconductor substrate, the multi-layer stack including a plurality of sacrificial layers that alternate with a plurality of channel layers; forming a dummy gate on the multi-layer stack; forming a first spacer on a sidewall of the dummy gate; performing a first implantation process to form a first doped region, the first implantation process having a first implant energy and a first implant dose; performing a second implantation process to form a second doped region, where the first doped region and the second doped region are in a portion of the channel layers uncovered by the first spacer and the dummy gate, the second implantation process having a second implant energy and a second implant dose, where the second implant energy is greater than the first implant energy, and where the first implant dose is different from the second implant dose.