Taiwan semiconductor manufacturing company, ltd. (20240379671). HIGH VOLTAGE TRANSISTOR STRUCTURES simplified abstract
Contents
HIGH VOLTAGE TRANSISTOR STRUCTURES
Organization Name
taiwan semiconductor manufacturing company, ltd.
Inventor(s)
Wen-Tuo Huang of Tainan City (TW)
Yong-Shiuan Tsair of Tainan City (TW)
HIGH VOLTAGE TRANSISTOR STRUCTURES - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240379671 titled 'HIGH VOLTAGE TRANSISTOR STRUCTURES
The present disclosure outlines a method for creating input/output (I/O) fin field-effect transistors (FET) with polysilicon gate electrodes and silicon oxide gate dielectrics, as well as non-I/O FETs with metal gate electrodes and high-k gate dielectrics.
- Deposit a silicon oxide layer on one region of a semiconductor substrate and a high-k dielectric layer on another region.
- Add a polysilicon layer on top of the silicon oxide and high-k dielectric layers.
- Pattern the polysilicon layer to form two gate electrode structures, one on each layer.
- Replace the second polysilicon gate electrode structure with a metal gate electrode structure.
Potential Applications: - Semiconductor manufacturing - Integrated circuit design - Electronics industry
Problems Solved: - Enhancing transistor performance - Improving efficiency in electronic devices
Benefits: - Increased functionality of transistors - Enhanced performance of electronic devices
Commercial Applications: Title: Advanced Transistor Technology for Semiconductor Industry This technology could revolutionize the semiconductor industry by improving the efficiency and performance of electronic devices. It has the potential to be widely adopted in various electronic applications, leading to significant advancements in technology.
Questions about the technology: 1. How does this method compare to traditional transistor manufacturing processes? 2. What are the potential cost implications of implementing this technology in semiconductor production?
Original Abstract Submitted
the present disclosure describes a method for forming (i) input/output (i/o) fin field effect transistors (fet) with polysilicon gate electrodes and silicon oxide gate dielectrics integrated and (ii) non-i/o fets with metal gate electrodes and high-k gate dielectrics. the method includes depositing a silicon oxide layer on a first region of a semiconductor substrate and a high-k dielectric layer on a second region of the semiconductor substrate; depositing a polysilicon layer on the silicon oxide and high-k dielectric layers; patterning the polysilicon layer to form a first polysilicon gate electrode structure on the silicon oxide layer and a second polysilicon gate electrode structure on the high-k dielectric layer, where the first polysilicon gate electrode structure is wider than the second polysilicon gate electrode structure and narrower than the silicon oxide layer. the method further includes replacing the second polysilicon gate electrode structure with a metal gate electrode structure.
