Taiwan semiconductor manufacturing company, ltd. (20240379640). METHOD OF FORMING A SEMICONDUCTOR DEVICE PACKAGE WITH WARPAGE CONTROL simplified abstract
Contents
METHOD OF FORMING A SEMICONDUCTOR DEVICE PACKAGE WITH WARPAGE CONTROL
Organization Name
taiwan semiconductor manufacturing company, ltd.
Inventor(s)
Heh-Chang Huang of Hsinchu City (TW)
Fu-Jen Li of Hsinchu City (TW)
Pei-Haw Tsao of Tai-chung (TW)
Shyue-Ter Leu of Hsinchu City (TW)
METHOD OF FORMING A SEMICONDUCTOR DEVICE PACKAGE WITH WARPAGE CONTROL - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240379640 titled 'METHOD OF FORMING A SEMICONDUCTOR DEVICE PACKAGE WITH WARPAGE CONTROL
The method described in the abstract involves the formation of a semiconductor device package by bonding passive devices to a package substrate, encapsulating them with molding layers, and creating underfill elements to surround the passive devices and the die.
- Passive devices are bonded to a first surface of the package substrate.
- Underfill elements are formed to surround the passive devices on the first surface.
- A molding layer is applied to encapsulate the passive devices and underfill element.
- A die is bonded to a second surface of the package substrate.
- Underfill elements are formed to surround the die on the second surface.
- Another molding layer is applied to encapsulate the die and underfill element.
- Openings are created in the second molding layer to expose contact pads on the second surface.
- Conductive bumps are placed in the openings to electrically contact the contact pads.
Potential Applications: - Semiconductor packaging industry - Electronics manufacturing
Problems Solved: - Efficient and reliable packaging of semiconductor devices - Enhanced electrical connectivity
Benefits: - Improved performance and durability of semiconductor devices - Streamlined manufacturing process
Commercial Applications: - Semiconductor device manufacturing companies - Electronics industry suppliers
Questions about Semiconductor Device Package: 1. How does the method described in the patent application improve the reliability of semiconductor device packaging? 2. What are the key advantages of using underfill elements in the packaging process?
Frequently Updated Research: - Ongoing advancements in semiconductor packaging technology may impact the methods described in the patent application.
Original Abstract Submitted
a method of forming a semiconductor device package is provided, including bonding passive devices to a first surface of a package substrate; forming a first underfill element on the first surface to surround the passive devices; forming a first molding layer to encapsulate the passive devices and the first underfill element; bonding a die to a second surface of the package substrate; forming a second underfill element on the second surface to surround the die; forming a second molding layer to encapsulate the die and the second underfill element; forming openings in the second molding layer to expose contact pads formed on the second surface of the package substrate; and disposing conductive bumps in the openings to electrically contact the contact pads, wherein the conductive bumps is in direct contact with the second surface and exposed from the second molding layer.
