Taiwan semiconductor manufacturing company, ltd. (20240379627). SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

Organization Name

taiwan semiconductor manufacturing company, ltd.

Inventor(s)

Ying-Ju Chen of Yunlin County (TW)

Hsien-Wei Chen of Hsinchu City (TW)

Ming-Fa Chen of Taichung City (TW)

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240379627 titled 'SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

The semiconductor structure described in the patent application consists of a bottom die, a top die bonded to the bottom die with a through substrate via, an insulating layer covering the bottom die and laterally covering the top die, a first die connector on top of the insulating layer and the top die, and a second die connector on top of the top die connected to the through substrate via of the top die. The bonding interface between the top and bottom dies is flat, and the first die connector is inserted into the insulating layer to make electrical and physical contact with the bottom die.

• The semiconductor structure includes a bottom die, a top die, an insulating layer, and die connectors.
• The top and bottom dies are bonded with a through substrate via for connectivity.
• The insulating layer covers the bottom die and laterally covers the top die.
• A first die connector is placed over the insulating layer and the top die.
• A second die connector is positioned on top of the top die and connected to the through substrate via.
• The bonding interface between the top and bottom dies is flat for efficient connection.
• The first die connector is inserted into the insulating layer to establish electrical and physical contact with the bottom die.

Potential Applications: - This technology can be used in the manufacturing of advanced semiconductor devices. - It can be applied in the development of high-performance electronic components.

Problems Solved: - Provides a reliable and efficient method for connecting top and bottom dies in a semiconductor structure. - Ensures proper electrical and physical contact between different components.

Benefits: - Improved connectivity and performance in semiconductor structures. - Enhanced reliability and durability of electronic devices.

Commercial Applications: Title: Advanced Semiconductor Structure for Enhanced Connectivity This technology can be utilized in the production of high-end electronic devices such as smartphones, tablets, and computers, improving their overall performance and reliability in various applications.

Questions about the technology: 1. How does the flat bonding interface between the top and bottom dies contribute to the efficiency of the semiconductor structure? 2. What are the advantages of inserting the first die connector into the insulating layer for electrical and physical contact with the bottom die?

Original Abstract Submitted

a semiconductor structure includes a bottom die, a top die bonded to the bottom die and including a through substrate via, an insulating layer disposed on the bottom die and laterally covering the top die, a first die connector overlying the insulating layer and the top die, and a second die connector overlying the top die and connected to the through substrate via of the top die. a bonding interface of the top and bottom dies is substantially flat, and the first die connector is inserted into the insulating layer to be in electrical and physical contact with the bottom die.