Taiwan semiconductor manufacturing company, ltd. (20240379619). INTEGRATED CIRCUIT PACKAGES simplified abstract
Contents
INTEGRATED CIRCUIT PACKAGES
Organization Name
taiwan semiconductor manufacturing company, ltd.
Inventor(s)
Chuei-Tang Wang of Taichung City (TW)
Chieh-Yen Chen of Taipei City (TW)
Wei Ling Chang of Hsinchu (TW)
INTEGRATED CIRCUIT PACKAGES - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240379619 titled 'INTEGRATED CIRCUIT PACKAGES
The abstract describes a device that includes a first die array with integrated circuit dies arranged in alternating orientations along rows and columns, surrounded by a planar first dielectric layer. A second die array with integrated circuit dies in alternating orientations is bonded to the first die array using metal-to-metal and dielectric-to-dielectric bonds, also surrounded by a planar second dielectric layer.
- First die array with integrated circuit dies in alternating orientations
- Planar first dielectric layer surrounding the first integrated circuit dies
- Second die array with integrated circuit dies in alternating orientations
- Metal-to-metal and dielectric-to-dielectric bonds between the first and second die arrays
- Planar second dielectric layer surrounding the second integrated circuit dies
Potential Applications: - Advanced semiconductor devices - High-density integrated circuits - Multi-layered electronic systems
Problems Solved: - Increased integration density - Enhanced performance - Improved thermal management
Benefits: - Compact design - Efficient heat dissipation - Enhanced functionality
Commercial Applications: Title: Advanced Multi-Layered Semiconductor Devices for High-Performance Electronics This technology can be used in the development of high-performance electronic devices such as smartphones, tablets, and computers, where space-saving and efficient heat dissipation are crucial for optimal performance in a compact form factor.
Questions about the technology: 1. How does the alternating orientation of integrated circuit dies benefit the device's performance?
- The alternating orientation helps in optimizing space utilization and improving signal routing efficiency.
2. What are the advantages of using metal-to-metal and dielectric-to-dielectric bonds in the device?
- These bonds provide strong connections between the integrated circuit dies, enhancing overall device reliability and performance.
Original Abstract Submitted
in an embodiment, a device includes: a first die array including first integrated circuit dies, orientations of the first integrated circuit dies alternating along rows and columns of the first die array; a first dielectric layer surrounding the first integrated circuit dies, surfaces of the first dielectric layer and the first integrated circuit dies being planar; a second die array including second integrated circuit dies on the first dielectric layer and the first integrated circuit dies, orientations of the second integrated circuit dies alternating along rows and columns of the second die array, front sides of the second integrated circuit dies being bonded to front sides of the first integrated circuit dies by metal-to-metal bonds and by dielectric-to-dielectric bonds; and a second dielectric layer surrounding the second integrated circuit dies, surfaces of the second dielectric layer and the second integrated circuit dies being planar.
